Inventor · disambiguated record
Sam Gat-Shang Chu
Also filed as: CHU SAM G · CHU SAM GAT-SHANG
42 granted patents·4 pending applications·388 citations·filing 1996–2019
98Inventor score
Top patents by PatentIndex Score
46 records- 0197US9720696B2Independent mapping of threadsIBM·Filed 2014·Granted Aug 1, 2017·30 cites·6 claims
- 0293US9870229B2Independent mapping of threadsIBM·Filed 2015·Granted Jan 16, 2018·8 cites·9 claims
- 0391US6901546B2Enhanced debug scheme for LBISTIBM·Filed 2001·Granted May 31, 2005·56 cites·18 claims
- 0484US9870045B2Reducing power consumption in a multi-slice computer processorIBM·Filed 2016·Granted Jan 16, 2018·3 cites·7 claims
- 0584US9639418B2Parity protection of a registerIBM·Filed 2015·Granted May 2, 2017·4 cites·20 claims
- 0683US7668035B2Memory circuits with reduced leakage power and design structures for sameIBM·Filed 2008·Granted Feb 23, 2010·14 cites·17 claims
- 0779US5852373AStatic-dynamic logic circuitIBM·Filed 1996·Granted Dec 22, 1998·38 cites·5 claims
- 0877US7243209B2Apparatus and method for speeding up access time of a large register file with wrap capabilityIBM·Filed 2005·Granted Jul 10, 2007·8 cites·20 claims
- 0975US8127116B2Dependency matrix with reduced area and power consumptionISLAM SAIFUL·Filed 2009·Granted Feb 28, 2012·10 cites·18 claims
- 1074US6826090B1Apparatus and method for a radiation resistant latchIBM·Filed 2003·Granted Nov 30, 2004·21 cites·20 claims
- 1173US7506230B2Transient noise detection scheme and apparatusIBM·Filed 2005·Granted Mar 17, 2009·6 cites·10 claims
- 1272US7679973B2Register fileIBM·Filed 2008·Granted Mar 16, 2010·5 cites·12 claims
- 1372US7202704B2Leakage sensing and keeper circuit for proper operation of a dynamic circuitIBM·Filed 2004·Granted Apr 10, 2007·14 cites·20 claims
- 1472US6825691B1Apparatus and method for a radiation resistant latch with integrated scanIBM·Filed 2003·Granted Nov 30, 2004·19 cites·20 claims
- 1571US11163568B2Implementing write ports in register-file array cellIBM·Filed 2018·Granted Nov 2, 2021·1 cites·17 claims
- 1670US7562273B2Register file cell with soft error detection and circuits and methods using the cellIBM·Filed 2006·Granted Jul 14, 2009·7 cites·18 claims
- 1768US6922818B2Method of power consumption reduction in clocked circuitsIBM·Filed 2001·Granted Jul 26, 2005·14 cites·27 claims
- 1867US11144323B2Independent mapping of threadsIBM·Filed 2019·Granted Oct 12, 2021·0 cites·18 claims
- 1964US7663963B2Apparatus and method for providing multiple reads/writes using a 2Read/2Write register file arrayIBM·Filed 2008·Granted Feb 16, 2010·2 cites·17 claims
- 2064US7474574B1Shift register latch with embedded dynamic random access memory scan only cellIBM·Filed 2007·Granted Jan 6, 2009·5 cites·7 claims
- 2164US6002271ADynamic MOS logic circuit without charge sharing noiseIBM·Filed 1997·Granted Dec 14, 1999·19 cites·14 claims
- 2262US6052008AGeneration of true and complement signals in dynamic circuitsIBM·Filed 1997·Granted Apr 18, 2000·21 cites·13 claims
- 2362US6046606ASoft error protected dynamic circuitIBM·Filed 1998·Granted Apr 4, 2000·40 cites·17 claims
- 2461US10545762B2Independent mapping of threadsIBM·Filed 2017·Granted Jan 28, 2020·0 cites·20 claims
- 2560US10564691B2Reducing power consumption in a multi-slice computer processorIBM·Filed 2017·Granted Feb 18, 2020·0 cites·14 claims
- 2660US10209757B2Reducing power consumption in a multi-slice computer processorIBM·Filed 2017·Granted Feb 19, 2019·0 cites·7 claims
- 2758US7400548B2Method for providing multiple reads/writes using a 2read/2write register file arrayIBM·Filed 2005·Granted Jul 15, 2008·1 cites·1 claims
- 2858US6934181B2Reducing sub-threshold leakage in a memory arrayIBM·Filed 2003·Granted Aug 23, 2005·9 cites·16 claims
- 2956US9870039B2Reducing power consumption in a multi-slice computer processorIBM·Filed 2015·Granted Jan 16, 2018·0 cites·14 claims
- 3056US7443737B2Register fileIBM·Filed 2004·Granted Oct 28, 2008·5 cites·6 claims
- 3155US11119774B2Slice-target register file for microprocessorIBM·Filed 2019·Granted Sep 14, 2021·0 cites·20 claims
- 3255US6914450B2Register-file bit-read method and apparatusIBM·Filed 2003·Granted Jul 5, 2005·8 cites·20 claims
- 3354US7302553B2Apparatus, system and method for quickly determining an oldest instruction in a non-moving instruction queueIBM·Filed 2003·Granted Nov 27, 2007·3 cites·8 claims
- 3450US7551475B2Data shifting through scan registersIBM·Filed 2006·Granted Jun 23, 2009·1 cites·3 claims
- 3550US6914849B2Method and apparatus for reducing power consumption in a memory array with dynamic word line driver/decodersIBM·Filed 2003·Granted Jul 5, 2005·8 cites·13 claims
- 3648US7012839B1Register file apparatus and method incorporating read-after-write blocking using detection cellsIBM·Filed 2004·Granted Mar 14, 2006·4 cites·15 claims
- 3744US10296337B2Preventing premature reads from a general purpose registerIBM·Filed 2016·Granted May 21, 2019·0 cites·17 claims
- 3844US7002860B2Multilevel register-file bit-read method and apparatusIBM·Filed 2003·Granted Feb 21, 2006·4 cites·9 claims
- 3942US7561489B2System and method of selective row energization based on write dataIBM·Filed 2008·Granted Jul 14, 2009·0 cites·15 claims
- 4040US7379348B2System and method of selective row energization based on write dataIBM·Filed 2006·Granted May 27, 2008·0 cites·2 claims
- 4140US7142463B2Register file method incorporating read-after-write blocking using detection cellsIBM·Filed 2005·Granted Nov 28, 2006·0 cites·7 claims
- 4238US2017109093A1Method and apparatus for writing a portion of a register in a microprocessorIBM·Filed 2015·Application pending·0 cites
- 4337US2007229132A1Scannable domino latch redundancy for soft error rate protection with collision avoidanceCHU SAM G·Filed 2006·Application pending·0 cites
- 4436US2009027081A1Eight Transistor Tri-State Driver Implementing Cascade Structures To Reduce Peak Current Consumption, Layout Area and Slew RateIBM·Filed 2007·Application pending·0 cites
- 4535US7015723B2Dynamic-static logical control element for signaling an interval between the end of a control signal and a logical evaluationIBM·Filed 2004·Granted Mar 21, 2006·0 cites·20 claims
- 4635US2008123437A1Apparatus for Floating Bitlines in Static Random Access Memory ArraysAGARWAL VIKAS·Filed 2006·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →