Inventor · disambiguated record
Wen-Hann Wang
Also filed as: WANG WEN-HANN
19 granted patents·2 pending applications·868 citations·filing 1993–2012
96Inventor score
Technology areasG06F
Top patents by PatentIndex Score
21 records- 0191US7058750B1Scalable distributed memory and I/O multiprocessor systemINTEL CORP·Filed 2000·Granted Jun 6, 2006·53 cites·17 claims
- 0290US7343442B2Scalable distributed memory and I/O multiprocessor systems and associated methodsINTEL CORP·Filed 2006·Granted Mar 11, 2008·17 cites·20 claims
- 0387US7930464B2Scalable memory and I/O multiprocessor systemsINTEL CORP·Filed 2009·Granted Apr 19, 2011·11 cites·7 claims
- 0486US5548742AMethod and apparatus for combining a direct-mapped cache and a multiple-way cache in a cache memoryINTEL CORP·Filed 1994·Granted Aug 20, 1996·110 cites·32 claims
- 0584US5551005AApparatus and method of handling race conditions in mesi-based multiprocessor system with private cachesINTEL CORP·Filed 1994·Granted Aug 27, 1996·102 cites·22 claims
- 0683US6725341B1Cache line pre-load and pre-own based on cache coherence speculationINTEL CORP·Filed 2000·Granted Apr 20, 2004·32 cites·23 claims
- 0782US6006299AApparatus and method for caching lock conditions in a multi-processor systemINTEL CORP·Filed 1994·Granted Dec 21, 1999·94 cites·15 claims
- 0881US7076613B2Cache line pre-load and pre-own based on cache coherence speculationINTEL CORP·Filed 2004·Granted Jul 11, 2006·28 cites·17 claims
- 0980US7603508B2Scalable distributed memory and I/O multiprocessor systems and associated methodsINTEL CORP·Filed 2008·Granted Oct 13, 2009·6 cites·38 claims
- 1079US5530832ASystem and method for practicing essential inclusion in a multiprocessor and cache hierarchyIBM·Filed 1993·Granted Jun 25, 1996·80 cites·7 claims
- 1177US5715428AApparatus for maintaining multilevel cache hierarchy coherency in a multiprocessor computer systemINTEL CORP·Filed 1996·Granted Feb 3, 1998·82 cites·35 claims
- 1273US8745306B2Scalable distributed memory and I/O multiprocessor systemRANKIN LINDA J·Filed 2012·Granted Jun 3, 2014·2 cites·20 claims
- 1373US5642494ACache memory with reduced request-blockingINTEL CORP·Filed 1994·Granted Jun 24, 1997·60 cites·23 claims
- 1472US5829038ABackward inquiry to lower level caches prior to the eviction of a modified line from a higher level cache in a microprocessor hierarchical cache structureINTEL CORP·Filed 1996·Granted Oct 27, 1998·67 cites·10 claims
- 1570US5809524AMethod and apparatus for cache memory replacement line identificationINTEL CORP·Filed 1997·Granted Sep 15, 1998·57 cites·16 claims
- 1656US5701503AMethod and apparatus for transferring information between a processor and a memory systemINTEL CORP·Filed 1994·Granted Dec 23, 1997·27 cites·22 claims
- 1752US5956746AComputer system having tag information in a processor and cache memoryINTEL CORP·Filed 1997·Granted Sep 21, 1999·26 cites·21 claims
- 1851US8255605B2Scalable distributed memory and I/O multiprocessor systemRANKIN LINDA J·Filed 2011·Granted Aug 28, 2012·0 cites·20 claims
- 1942US5619673AVirtual access cache protection bits handling method and apparatusINTEL CORP·Filed 1996·Granted Apr 8, 1997·14 cites·15 claims
- 2040US2003005423A1Hardware assisted dynamic optimization of program executionFiled 2001·Application pending·0 cites
- 2137US2003004974A1Configurable system monitoring for dynamic optimization of program executionFiled 2001·Application pending·0 cites
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