Inventor · disambiguated record
Michael David May
Also filed as: MAY MICHAEL D · MAY MICHAEL DAVID
50 granted patents·4 pending applications·1,231 citations·filing 1983–2013
99Inventor score
Top patents by PatentIndex Score
54 records- 0195US6356960B1Microprocessor having an on-chip CPU fetching a debugging routine from a memory in an external debugging device in response to a control signal received through a debugging portSGS THOMSON MICROELECTRONICS·Filed 2000·Granted Mar 12, 2002·118 cites·21 claims
- 0289US7676653B2Compact instruction set encodingXMOS LTD·Filed 2007·Granted Mar 9, 2010·21 cites·57 claims
- 0387US6301657B1System and method for booting a computerSGS THOMSON MICROELECTRONICS·Filed 2000·Granted Oct 9, 2001·41 cites·14 claims
- 0487US4758948AMicrocomputerINMOS LTD·Filed 1984·Granted Jul 19, 1988·66 cites·32 claims
- 0587US4680698AHigh density ROM in separate isolation well on single with chipINMOS LTD·Filed 1983·Granted Jul 14, 1987·31 cites·15 claims
- 0686US4724517AMicrocomputer with prefixing functionsINMOS LTD·Filed 1983·Granted Feb 9, 1988·47 cites·41 claims
- 0785US4704678AFunction set for a microcomputerINMOS LTD·Filed 1983·Granted Nov 3, 1987·44 cites·32 claims
- 0879US7958333B2Processor with memory access stage adapted to fetch an instruction of a thread when no memory access operation is detectedXMOS LTD·Filed 2007·Granted Jun 7, 2011·9 cites·31 claims
- 0977US6415344B1System and method for on-chip communicationSGS THOMSON MICROELECTRONICS·Filed 1999·Granted Jul 2, 2002·73 cites·20 claims
- 1076US8224884B2Processor communication tokensMAY MICHAEL D·Filed 2008·Granted Jul 17, 2012·7 cites·62 claims
- 1176US7617386B2Scheduling thread upon ready signal set when port transfers data on trigger time activationXMOS LTD·Filed 2007·Granted Nov 10, 2009·9 cites·62 claims
- 1276US6564314B1Computer instruction compressionSGS THOMSON MICROELECTRONICS·Filed 1995·Granted May 13, 2003·81 cites·20 claims
- 1376US4967326AMicrocomputer building blockINMOS LTD·Filed 1986·Granted Oct 30, 1990·35 cites·22 claims
- 1474US8966488B2Synchronising groups of threads with dedicated hardware logicMAY MICHAEL D·Filed 2007·Granted Feb 24, 2015·8 cites·57 claims
- 1574US8347312B2Thread communicationsXMOS LTD·Filed 2007·Granted Jan 1, 2013·8 cites·47 claims
- 1674US6694407B1Cache memory with data transfer control and method of operating sameUNIVERISITY OF BRISTOL·Filed 2000·Granted Feb 17, 2004·25 cites·15 claims
- 1774US6414368B1Microcomputer with high density RAM on single chipSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Jul 2, 2002·64 cites·30 claims
- 1873US5031092AMicrocomputer with high density ram in separate isolation well on single chipINMOS LTD·Filed 1989·Granted Jul 9, 1991·32 cites·25 claims
- 1971US8185722B2Processor instruction set for controlling threads to respond to eventsMAY MICHAEL D·Filed 2007·Granted May 22, 2012·5 cites·48 claims
- 2071US7613909B2Resuming thread to service ready port transferring data externally at different clock rate than internal circuitry of a processorXMOS LTD·Filed 2007·Granted Nov 3, 2009·6 cites·62 claims
- 2171US5140583AMessage routingINMOS LTD·Filed 1990·Granted Aug 18, 1992·62 cites·33 claims
- 2271US4819151AMicrocomputerINMOS LTD·Filed 1986·Granted Apr 4, 1989·27 cites·41 claims
- 2370US9367321B2Processor instruction set for controlling an event source to generate events used to schedule threadsMAY MICHAEL D·Filed 2007·Granted Jun 14, 2016·5 cites·48 claims
- 2469US7962717B2Message routing schemeXMOS LTD·Filed 2007·Granted Jun 14, 2011·3 cites·37 claims
- 2569US5130977AMessage routingINMOS LTD·Filed 1990·Granted Jul 14, 1992·45 cites·22 claims
- 2669US4989133ASystem for executing, scheduling, and selectively linking time dependent processes based upon scheduling time thereofINMOS LTD·Filed 1988·Granted Jan 29, 1991·42 cites·51 claims
- 2769US4794526AMicrocomputer with priority schedulingINMOS LTD·Filed 1984·Granted Dec 27, 1988·28 cites·23 claims
- 2868US7948060B2Integrated circuit structureXMOS LTD·Filed 2008·Granted May 24, 2011·5 cites·21 claims
- 2966US8219789B2Interface processorMAY MICHAEL D·Filed 2007·Granted Jul 10, 2012·3 cites·56 claims
- 3065US8139601B2Token protocolMAY MICHAEL D·Filed 2008·Granted Mar 20, 2012·3 cites·44 claims
- 3165US6697931B1System and method for communicating information to and from a single chip computer system through an external communication port with translation circuitrySGS THOMSON MICROELECTRONICS·Filed 2000·Granted Feb 24, 2004·11 cites·17 claims
- 3260US5452467AMicrocomputer with high density ram in separate isolation well on single chipINMOS LTD·Filed 1993·Granted Sep 19, 1995·16 cites·25 claims
- 3358US5495619AApparatus providing addressable storage locations as virtual links and storing predefined destination information for any messages transmitted on virtual links at these locationsSGS THOMSON MICROELECTRONICS·Filed 1994·Granted Feb 27, 1996·34 cites·38 claims
- 3458US5327127AMessage encoding which utilizes control codes and data codesINMOS LTD·Filed 1992·Granted Jul 5, 1994·26 cites·10 claims
- 3557US6009508ASystem and method for addressing plurality of data values with a single address in a multi-value store on FIFO basisSGS THOMSON MICROELECTRONICS·Filed 1997·Granted Dec 28, 1999·33 cites·16 claims
- 3655US5422881AMessage encodingINMOS LTD·Filed 1993·Granted Jun 6, 1995·34 cites·7 claims
- 3751US5506437AMicrocomputer with high density RAM in separate isolation well on single chipINMOS LTD·Filed 1993·Granted Apr 9, 1996·17 cites·13 claims
- 3851US4692861AMicrocomputer with interprocess communicationINMOS LTD·Filed 1984·Granted Sep 8, 1987·17 cites·36 claims
- 3950US8185719B2Message routing scheme for an array having a switch with address comparing component and message routing componentMAY MICHAEL D·Filed 2010·Granted May 22, 2012·0 cites·32 claims
- 4050US5491359AMicrocomputer with high density ram in separate isolation well on single chipINMOS LTD·Filed 1993·Granted Feb 13, 1996·16 cites·14 claims
- 4150US2011131396A1Timing analysisXMOS LTD·Filed 2009·Application pending·0 cites
- 4247US8898438B2Processor architecture for use in scheduling threads in response to communication activityMAY MICHAEL D·Filed 2007·Granted Nov 25, 2014·0 cites·46 claims
- 4346US4783734AComputer system with variable length process to process communicationINMOS LTD·Filed 1984·Granted Nov 8, 1988·11 cites·20 claims
- 4445US2009013397A1Processor communication tokensXMOS LTD·Filed 2007·Application pending·0 cites
- 4544US4811277ACommunication interfaceINMOS LTD·Filed 1984·Granted Mar 7, 1989·17 cites·19 claims
- 4644US2009013331A1Token protocolXMOS LTD·Filed 2007·Application pending·0 cites
- 4742US9594720B2Interface between a bus and a inter-thread interconnectXMOS LTD·Filed 2013·Granted Mar 14, 2017·0 cites·26 claims
- 4842US2003034544A1MicrocomputerFiled 2002·Application pending·0 cites
- 4940US6397325B1Microcomputer with packet translation for event packets and memory access packetsSGS THOMSON MICROELECTRONICS·Filed 1999·Granted May 28, 2002·11 cites·43 claims
- 5038US6757759B1Microcomputer chips with interconnected address and data pathsSGS THOMSON MICROELECTRONICS·Filed 1999·Granted Jun 29, 2004·9 cites·22 claims
Showing the top 50 of 54 patent records by PatentIndex Score.
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