Inventor · disambiguated record
Michael Klein
Also filed as: KLEIN MICHAEL · KLEIN MICHAEL T
42 granted patents·8 pending applications·331 citations·filing 1986–2024
97Inventor score
Top patents by PatentIndex Score
50 records- 0194US10169451B1Rapid character substring searchingIBM·Filed 2018·Granted Jan 1, 2019·22 cites·16 claims
- 0283US10296294B2Multiply-add operations of binary numbers in an arithmetic unitIBM·Filed 2018·Granted May 21, 2019·3 cites·1 claims
- 0380US11442726B1Vector pack and unpack instructionsIBM·Filed 2021·Granted Sep 13, 2022·1 cites·25 claims
- 0479US5970243AOnline programming changes for industrial logic controllersSTEEPLECHASE SOFTWARE INC·Filed 1997·Granted Oct 19, 1999·106 cites·16 claims
- 0578US8352530B2Residue calculation with built-in correction in a floating point unit positioned at different levels using correction values provided by multiplexerIBM·Filed 2008·Granted Jan 8, 2013·9 cites·17 claims
- 0676US8244783B2Normalizer shift prediction for log estimate instructionsBOERSMA MAARTEN J·Filed 2008·Granted Aug 14, 2012·8 cites·12 claims
- 0773US9430190B2Fused multiply add pipelineIBM·Filed 2014·Granted Aug 30, 2016·3 cites·20 claims
- 0871US10372417B2Multiply-add operations of binary numbers in an arithmetic unitIBM·Filed 2017·Granted Aug 6, 2019·1 cites·13 claims
- 0970US10140090B2Computing and summing up multiple products in a single multiplierIBM·Filed 2016·Granted Nov 27, 2018·2 cites·9 claims
- 1070US5153884AIntelligent network interface circuitALLEN BRADLEY CO·Filed 1990·Granted Oct 6, 1992·72 cites·4 claims
- 1169US9959093B2Binary fused multiply-add floating-point calculationsIBM·Filed 2016·Granted May 1, 2018·1 cites·14 claims
- 1268US6275955B1Diagnostic software for facilitating flowchart programmingSTEEPLECHASE SOFTWARE INC·Filed 1998·Granted Aug 14, 2001·25 cites·18 claims
- 1366US11861325B2Repurposed hexadecimal floating point data pathIBM·Filed 2021·Granted Jan 2, 2024·0 cites·11 claims
- 1465US12430127B1Vector test decimal instruction for validity testingIBM·Filed 2024·Granted Sep 30, 2025·0 cites·24 claims
- 1565US9513987B2Using error correcting codes for parity purposesIBM·Filed 2014·Granted Dec 6, 2016·2 cites·10 claims
- 1661US11188299B2Repurposed hexadecimal floating point data pathIBM·Filed 2019·Granted Nov 30, 2021·0 cites·8 claims
- 1761US10572223B2Parallel decimal multiplication hardware with a 3x generatorIBM·Filed 2019·Granted Feb 25, 2020·0 cites·20 claims
- 1860US12190078B2Rounding hexadecimal floating point numbers using binary incrementorsIBM·Filed 2022·Granted Jan 7, 2025·0 cites·20 claims
- 1958US10983159B2Method and apparatus for wiring multiple technology evaluation circuitsIBM·Filed 2018·Granted Apr 20, 2021·0 cites·17 claims
- 2058US10558432B2Multiply-add operations of binary numbers in an arithmetic unitIBM·Filed 2017·Granted Feb 11, 2020·0 cites·7 claims
- 2158US9529664B2Using error correcting codes for parity purposesIBM·Filed 2014·Granted Dec 27, 2016·0 cites·5 claims
- 2258US4785255ADigital FSK signal demodulatorALLEN BRADLEY CO·Filed 1987·Granted Nov 15, 1988·21 cites·14 claims
- 2358US2025328346A1Instruction with a preserve sign controlIBM·Filed 2024·Application pending·0 cites
- 2458US2025370748A1Convert instruction with overflow result controlIBM·Filed 2024·Application pending·0 cites
- 2557US12056465B2Verifying the correctness of a leading zero counterIBM·Filed 2022·Granted Aug 6, 2024·0 cites·20 claims
- 2657US10310815B1Parallel decimal multiplication hardware with a 3X generatorIBM·Filed 2017·Granted Jun 4, 2019·0 cites·20 claims
- 2757US2025307124A1Vector test zoned instruction for validity testingIBM·Filed 2024·Application pending·0 cites
- 2856US9697074B2Non-local error detection in processor systemsIBM·Filed 2014·Granted Jul 4, 2017·0 cites·20 claims
- 2954US11099602B2Fault-tolerant clock gatingIBM·Filed 2019·Granted Aug 24, 2021·0 cites·20 claims
- 3054US9952829B2Binary fused multiply-add floating-point calculationsIBM·Filed 2016·Granted Apr 24, 2018·0 cites·17 claims
- 3153US6058333AAnimation of execution historySTEEPLECHASE SOFTWARE INC·Filed 1997·Granted May 2, 2000·20 cites·6 claims
- 3253US2016357636A1Using error correcting codes for parity purposesIBM·Filed 2016·Application pending·0 cites
- 3352US11314512B2Efficient checking of a condition code anticipator for a floating point processor and/or unitIBM·Filed 2019·Granted Apr 26, 2022·0 cites·20 claims
- 3451US11175890B2Hexadecimal exponent alignment for binary floating point unitIBM·Filed 2019·Granted Nov 16, 2021·0 cites·14 claims
- 3551US10890622B2Integrated circuit control latch protectionIBM·Filed 2019·Granted Jan 12, 2021·0 cites·20 claims
- 3651US9928135B2Non-local error detection in processor systemsIBM·Filed 2015·Granted Mar 27, 2018·0 cites·7 claims
- 3750US5963446AExtended relay ladder logic for programmable logic controllersSTEEPLECHASE SOFTWARE INC·Filed 1997·Granted Oct 5, 1999·19 cites·12 claims
- 3848US11531546B2Hexadecimal floating point multiply and add instructionIBM·Filed 2021·Granted Dec 20, 2022·0 cites·25 claims
- 3948US2023289138A1Hardware device to execute instruction to convert input value from one data format to another data formatIBM·Filed 2022·Application pending·0 cites
- 4048US2023289139A1Hardware device to execute instruction to convert input value from one data format to another data formatIBM·Filed 2022·Application pending·0 cites
- 4147US11269651B2Reusing adjacent SIMD unit for fast wide result generationIBM·Filed 2019·Granted Mar 8, 2022·0 cites·17 claims
- 4246US10275391B2Combining of several execution units to compute a single wide scalar resultIBM·Filed 2017·Granted Apr 30, 2019·0 cites·19 claims
- 4346US9734126B1Post-silicon configurable instruction behavior based on input operandsIBM·Filed 2016·Granted Aug 15, 2017·0 cites·17 claims
- 4444US2021048982A1Partial product floating-point multiplication circuitry operand summationIBM·Filed 2019·Application pending·0 cites
- 4541US2023308113A1Reduced logic conversion of binary integers to binary coded decimalsIBM·Filed 2022·Application pending·0 cites
- 4638US11159183B2Residue checking of entire normalizer output of an extended resultIBM·Filed 2019·Granted Oct 26, 2021·0 cites·9 claims
- 4738US10416962B2Decimal and binary floating point arithmetic calculationsIBM·Filed 2015·Granted Sep 17, 2019·0 cites·17 claims
- 4838US4881229ATest circuit arrangement for a communication network and test method using sameALCATEL NV·Filed 1987·Granted Nov 14, 1989·9 cites·10 claims
- 4936US4694257APhase-coherent demodulation clock and data recoveryMOTOROLA INC·Filed 1986·Granted Sep 15, 1987·7 cites·7 claims
- 5031US8626807B2Reuse of rounder for fixed conversion of log instructionsBOERSMA MAARTEN·Filed 2009·Granted Jan 7, 2014·0 cites·17 claims
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