Inventor · disambiguated record
Gil Horovitz
Also filed as: HOROVITZ GIL
18 granted patents·1 pending application·25 citations·filing 2016–2023
89Inventor score
Top patents by PatentIndex Score
19 records- 0191US9923563B1Deterministic jitter removal using a closed loop digital-analog mechanismINTEL IP CORP·Filed 2016·Granted Mar 20, 2018·14 cites·25 claims
- 0283US10474110B1Adaptive time-to-digital converter and methodINTEL CORP·Filed 2018·Granted Nov 12, 2019·5 cites·26 claims
- 0375US12191871B2Methods and devices for TDC resolution improvementINTEL CORP·Filed 2021·Granted Jan 7, 2025·1 cites·11 claims
- 0474US11005481B2Systems and methods for mitigation of nonlinearity related phase noise degradationsAPPLE INC·Filed 2018·Granted May 11, 2021·2 cites·20 claims
- 0574US10938396B2Quadrature local oscillator signal generation systems and methodsAPPLE INC·Filed 2019·Granted Mar 2, 2021·3 cites·14 claims
- 0659US10809669B2Adaptive time-to-digital converter and methodINTEL CORP·Filed 2019·Granted Oct 20, 2020·0 cites·26 claims
- 0758US11264997B2Frequency synthesis with reference signal generated by opportunistic phase locked loopINTEL CORP·Filed 2020·Granted Mar 1, 2022·0 cites·16 claims
- 0851US11824576B2Apparatus, system and method for generating an output oscillator signal, transceiver, mobile device and base stationINTEL CORP·Filed 2020·Granted Nov 21, 2023·0 cites·34 claims
- 0950US11283426B2Electrical device, electrical system with an electrical device and method to provide an electrical deviceAPPLE INC·Filed 2017·Granted Mar 22, 2022·0 cites·19 claims
- 1050US11237195B2Frequency estimationINTEL CORP·Filed 2017·Granted Feb 1, 2022·0 cites·14 claims
- 1150US10804911B2Frequency synthesis with reference signal generated by opportunistic phase locked loopINTEL CORP·Filed 2019·Granted Oct 13, 2020·0 cites·20 claims
- 1250US2024402251A1Mixed signal circuit, methods and devices for testing mixed signal circuitsINTEL CORP·Filed 2023·Application pending·0 cites
- 1345US10103761B2Local oscillator signal generation using opportunistic synthesizer to clock digital synthesisINTEL CORP·Filed 2016·Granted Oct 16, 2018·0 cites·19 claims
- 1443US11558059B2Concept for a digital controlled loop and a digital loop filterINTEL CORP·Filed 2020·Granted Jan 17, 2023·0 cites·23 claims
- 1543US10768580B2Time-to-digital converter, digital phase-locked loop, method for operating a time-to-digital converter, and method for a digital phase-locked loopINTEL IP CORP·Filed 2017·Granted Sep 8, 2020·0 cites·15 claims
- 1643US10686451B2DPLL with adjustable delay in integer operation modeINTEL IP CORP·Filed 2016·Granted Jun 16, 2020·0 cites·24 claims
- 1739US10707880B2Circuit, apparatus, digital phase locked loop, receiver, transceiver, mobile device, method and computer program to reduce noise in a phase signalINTEL IP CORP·Filed 2017·Granted Jul 7, 2020·0 cites·22 claims
- 1839US10263624B2Phase synchronization between two phase locked loopsINTEL IP CORP·Filed 2017·Granted Apr 16, 2019·0 cites·17 claims
- 1933US10418942B2Reference signal path for clock generation with an injection locked multiplier (ILM)INTEL IP CORP·Filed 2016·Granted Sep 17, 2019·0 cites·21 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →