Inventor · disambiguated record
Denis Rideau
Also filed as: RIDEAU DENIS
15 granted patents·3 pending applications·13 citations·filing 2011–2024
87Inventor score
Files withST MICROELECTRONICS CROLLES 2 SAS6ST MICROELECTRONICS SA5ST MICROELECTRONICS CROLLES 23DORNEL ERWAN2COMMISSARIAT ENERGIE ATOMIQUE1
Top patents by PatentIndex Score
18 records- 0188US10903259B2Image sensorST MICROELECTRONICS CROLLES 2 SAS·Filed 2019·Granted Jan 26, 2021·3 cites·20 claims
- 0278US11049892B2Image sensorST MICROELECTRONICS CROLLES 2 SAS·Filed 2019·Granted Jun 29, 2021·1 cites·19 claims
- 0373US12324251B2Integrated circuit comprising a single photon avalanche diode and corresponding manufacturing methodST MICROELECTRONICS CROLLES 2 SAS·Filed 2024·Granted Jun 3, 2025·0 cites·23 claims
- 0470US12324250B2Single-photon avalanche photodiodeST MICROELECTRONICS CROLLES 2 SAS·Filed 2022·Granted Jun 3, 2025·0 cites·17 claims
- 0570US9318372B2Method of stressing a semiconductor layerST MICROELECTRONICS SA·Filed 2014·Granted Apr 19, 2016·2 cites·26 claims
- 0669US9331175B2Method of locally stressing a semiconductor layerST MICROELECTRONICS SA·Filed 2014·Granted May 3, 2016·2 cites·21 claims
- 0769US9305828B2Method of forming stressed SOI layerST MICROELECTRONICS SA·Filed 2014·Granted Apr 5, 2016·2 cites·25 claims
- 0869US9240466B2Method of introducing local stress in a semiconductor layerST MICROELECTRONICS SA·Filed 2014·Granted Jan 19, 2016·2 cites·23 claims
- 0966US11581449B2Single-photon avalanche photodiodeST MICROELECTRONICS CROLLES 2 SAS·Filed 2019·Granted Feb 14, 2023·0 cites·20 claims
- 1065US11949035B2Integrated circuit comprising a single photon avalanche diode and corresponding manufacturing methodST MICROELECTRONICS CROLLES 2 SAS·Filed 2021·Granted Apr 2, 2024·0 cites·19 claims
- 1159US8741704B2Metal oxide semiconductor (MOS) device with locally thickened gate oxideDORNEL ERWAN·Filed 2012·Granted Jun 3, 2014·1 cites·20 claims
- 1250US8928051B2Metal oxide semiconductor (MOS) device with locally thickened gate oxideIBM·Filed 2013·Granted Jan 6, 2015·0 cites·15 claims
- 1347US2015097241A1Method for relaxing the transverse mechanical stresses within the active region of a mos transistor, and corresponding integrated circuitST MICROELECTRONICS CROLLES 2·Filed 2014·Application pending·0 cites
- 1444US9543214B2Method of forming stressed semiconductor layerST MICROELECTRONICS SA·Filed 2014·Granted Jan 10, 2017·0 cites·22 claims
- 1541US2016099183A1Method for relaxing the transverse mechanical stresses within the active region of a mos transistor, and corresponding integrated circuitST MICROELECTRONICS CROLLES 2·Filed 2015·Application pending·0 cites
- 1636US9514996B2Process for fabricating SOI transistors for an increased integration densityCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Dec 6, 2016·0 cites·18 claims
- 1735US2011303990A1Semiconductor Device and Method Making SameDORNEL ERWAN·Filed 2011·Application pending·0 cites
- 1833US9356090B2PMOS transistor with improved mobility of the carriersST MICROELECTRONICS CROLLES 2·Filed 2015·Granted May 31, 2016·0 cites·20 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →