Inventor · disambiguated record
Shivanand I. Akkihal
Also filed as: AKKIHAL SHIVANAND I
8 granted patents·1 pending application·41 citations·filing 2002–2024
83Inventor score
Top patents by PatentIndex Score
9 records- 0186US12137156B2Physical layer to link layer interface and related systems, methods and devicesMICROCHIP TECH INC·Filed 2022·Granted Nov 5, 2024·1 cites·15 claims
- 0278US7158596B2Communication system and method for sending and receiving data at a higher or lower sample rate than a network frame rate using a phase locked loopSTANDARD MICROSYST SMC·Filed 2002·Granted Jan 2, 2007·16 cites·23 claims
- 0376US11671521B2Ethernet interface and related systems, methods and devicesMICROCHIP TECH INC·Filed 2019·Granted Jun 6, 2023·2 cites·23 claims
- 0473US8861664B2Communication system and method for synchronizing a plurality of network nodes after a network lock condition occursAKKIHAL SHIVANAND I·Filed 2012·Granted Oct 14, 2014·4 cites·16 claims
- 0571US11431468B2Physical layer to link layer interface and related systems, methods and devicesMICROCHIP TECH INC·Filed 2019·Granted Aug 30, 2022·1 cites·18 claims
- 0671US11171732B2Ethernet interface and related systems methods and devicesMICROCHIP TECH INC·Filed 2019·Granted Nov 9, 2021·1 cites·14 claims
- 0768US7272202B2Communication system and method for generating slave clocks and sample clocks at the source and destination ports of a synchronous network using the network frame rateSTANDARD MICROSYST SMC·Filed 2002·Granted Sep 18, 2007·16 cites·24 claims
- 0865US11757550B2Ethernet interface and related systems, methods and devicesMICROCHIP TECH INC·Filed 2021·Granted Sep 12, 2023·0 cites·20 claims
- 0948US2025007515A1Adapting to supply voltage stress at a system basis chipMICROCHIP TECH INC·Filed 2024·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →