Inventor · disambiguated record
Chen-Chiu Hsue
Also filed as: HSUE CHEN C · HSUE CHEN-CHIU
98 granted patents·11 pending applications·2,050 citations·filing 1991–2020
99Inventor score
Files withUNITED MICROELECTRONICS CORP73SILICON INTEGRATED SYS CORP15POWERCHIP SEMICONDUCTOR CORP5POWERCHIP SEMICONDUCTOR MFG CORP2SILICON INTEGRATED SAYSTEMS CO1
Top patents by PatentIndex Score
109 records- 0194US6696222B2Dual damascene process using metal hard maskSILICON INTEGRATED SYS CORP·Filed 2001·Granted Feb 24, 2004·101 cites·14 claims
- 0293US6486059B2Dual damascene process using an oxide liner for a dielectric barrier layerSILICON INTERGRATED SYSTEMS CO·Filed 2001·Granted Nov 26, 2002·74 cites·20 claims
- 0392US5418176AProcess for producing memory devices having narrow buried N+ linesUNITED MICROELECTRONICS CORP·Filed 1994·Granted May 23, 1995·88 cites·17 claims
- 0490US6521523B2Method for forming selective protection layers on copper interconnectsSILICON INTEGRATED SYS CORP·Filed 2001·Granted Feb 18, 2003·51 cites·31 claims
- 0590US5559352AESD protection improvementUNITED MICROELECTRONICS CORP·Filed 1994·Granted Sep 24, 1996·70 cites·8 claims
- 0688US5716884AProcess for fabricating a stacked capacitorUNITED MICROELECTRONICS CORP·Filed 1996·Granted Feb 10, 1998·57 cites·19 claims
- 0788US5667940AProcess for creating high density integrated circuits utilizing double coating photoresist maskUNITED MICROELECTRONICS CORP·Filed 1996·Granted Sep 16, 1997·96 cites·20 claims
- 0886US5698458AMultiple well device and process of manufactureUNITED MICROELECTRONICS CORP·Filed 1996·Granted Dec 16, 1997·67 cites·1 claims
- 0984US7183606B2Flash memory cell and manufacturing method thereofPOWERCHIP SEMICONDUCTOR CORP·Filed 2005·Granted Feb 27, 2007·9 cites·9 claims
- 1084US5510279AMethod of fabricating an asymmetric lightly doped drain transistor deviceUNITED MICROELECTRONICS CORP·Filed 1995·Granted Apr 23, 1996·75 cites·9 claims
- 1182US5946571AMethod of forming a capacitorUNITED MICROELECTRONICS CORP·Filed 1997·Granted Aug 31, 1999·45 cites·15 claims
- 1282US5529943AMethod of making buried bit line ROM with low bit line resistanceUNITED MICROELECTRONICS CORP·Filed 1994·Granted Jun 25, 1996·43 cites·3 claims
- 1380US5374565AMethod for ESD protection improvementUNITED MICROELECTRONICS CORP·Filed 1993·Granted Dec 20, 1994·40 cites·6 claims
- 1479US5460999AMethod for making fin-shaped stack capacitors on DRAM chipsUNITED MICROELECTRONICS CORP·Filed 1994·Granted Oct 24, 1995·39 cites·20 claims
- 1578US6492226B1Method for forming a metal capacitor in a damascene processSILICON INTEGRATED SYS CORP·Filed 2001·Granted Dec 10, 2002·27 cites·12 claims
- 1677US6338999B1Method for forming metal capacitors with a damascene processSILICON INTEGRATED SYS CORP·Filed 2001·Granted Jan 15, 2002·21 cites·8 claims
- 1777US5413950AMethod of forming a DRAM stacked capacitor cellUNITED MICROELECTRONICS CORP·Filed 1994·Granted May 9, 1995·45 cites·15 claims
- 1876US6953963B2Flash memory cellPOWERCHIP SEMICONDUCTOR CORP·Filed 2004·Granted Oct 11, 2005·16 cites·8 claims
- 1976US5734200APolycide bonding pad structureUNITED MICROELECTRONICS CORP·Filed 1997·Granted Mar 31, 1998·43 cites·18 claims
- 2076US5516713AMethod of making high coupling ratio NAND type flash memoryUNITED MICROELECTRONICS CORP·Filed 1994·Granted May 14, 1996·33 cites·18 claims
- 2175US6483142B1Dual damascene structure having capacitorsSILICON INTEGRATED SYS CORP·Filed 2002·Granted Nov 19, 2002·22 cites·12 claims
- 2274US6391713B1Method for forming a dual damascene structure having capacitorsSILICON INTEGRATED SYS CORP·Filed 2001·Granted May 21, 2002·22 cites·12 claims
- 2373US5924006ATrench surrounded metal patternUNITED MICROELECTRONICS CORP·Filed 1997·Granted Jul 13, 1999·44 cites·22 claims
- 2473US5455444ADouble polysilicon electrostatic discharge protection device for SRAM and DRAM memory devicesUNITED MICROELECTRONICS CORP·Filed 1994·Granted Oct 3, 1995·34 cites·13 claims
- 2573US5436186AProcess for fabricating a stacked capacitorUNITED MICROELECTRONICS CORP·Filed 1994·Granted Jul 25, 1995·27 cites·10 claims
- 2673US5393233AProcess for fabricating double poly high density buried bit line mask ROMUNITED MICROELECTRONICS CORP·Filed 1993·Granted Feb 28, 1995·26 cites·2 claims
- 2772US5380673ADram capacitor structureUNITED MICROELECTRONICS CORP·Filed 1994·Granted Jan 10, 1995·34 cites·18 claims
- 2870US6410386B1Method for forming a metal capacitor in a damascene processSILICON INTEGRATED SYS CORP·Filed 2001·Granted Jun 25, 2002·20 cites·10 claims
- 2970US5429975AMethod of implanting during manufacture of ROM deviceUNITED MICROELECTRONICS CORP·Filed 1993·Granted Jul 4, 1995·25 cites·11 claims
- 3069US5429980AMethod of forming a stacked capacitor using sidewall spacers and local oxidationUNITED MICROELECTRONICS CORP·Filed 1994·Granted Jul 4, 1995·30 cites·22 claims
- 3168US6495877B1Metal capacitors with damascene structures and method for forming the sameSILICON INTEGRATED SYS CORP·Filed 2001·Granted Dec 17, 2002·13 cites·17 claims
- 3268US6358792B1Method for fabricating metal capacitorSILICON INTEGRATED SYS CORP·Filed 2001·Granted Mar 19, 2002·15 cites·12 claims
- 3368US5430328AProcess for self-align contactUNITED MICROELECTRONICS CORP·Filed 1994·Granted Jul 4, 1995·37 cites·25 claims
- 3466US6649512B1Method for improving adhesion of a low k dielectric to a barrier layerSILICON INTEGRATED SYS CORP·Filed 2002·Granted Nov 18, 2003·13 cites·18 claims
- 3566US5496776ASpin-on-glass planarization process with ion implantationUNITED MICROELECTRONICS CORP·Filed 1995·Granted Mar 5, 1996·37 cites·10 claims
- 3666US5416036AMethod of improvement ESD for LDD processUNITED MICROELECTRONICS CORP·Filed 1993·Granted May 16, 1995·25 cites·10 claims
- 3764US5480822AMethod of manufacture of semiconductor memory device with multiple, orthogonally disposed conductorsUNITED MICROELECTRONICS CORP·Filed 1994·Granted Jan 2, 1996·28 cites·17 claims
- 3862US5712500AMultiple cell with common bit line contact and method of manufacture thereofUNITED MICROELECTRONICS CORP·Filed 1996·Granted Jan 27, 1998·24 cites·15 claims
- 3961US5661081AMethod of bonding an aluminum wire to an intergrated circuit bond padUNITED MICROELECTRONICS CORP·Filed 1994·Granted Aug 26, 1997·24 cites·15 claims
- 4061US5484743ASelf-aligned anti-punchthrough implantation processUNITED MICROELECTRONICS CORP·Filed 1995·Granted Jan 16, 1996·21 cites·17 claims
- 4160US5668031AMethod of fabricating high density flat cell mask ROMUNITED MICROELECTRONICS CORP·Filed 1996·Granted Sep 16, 1997·18 cites·5 claims
- 4260US5625213ATop floating-gate flash EEPROM structureUNITED MICROELECTRONICS CORP·Filed 1995·Granted Apr 29, 1997·17 cites·9 claims
- 4359US5585656AHigh coupling ratio of flash memoryUNITED MICROELECTRONICS CORP·Filed 1995·Granted Dec 17, 1996·16 cites·8 claims
- 4459US5369048AStack capacitor DRAM cell with buried bit-line and method of manufactureUNITED MICROELECTRONICS CORP·Filed 1993·Granted Nov 29, 1994·19 cites·12 claims
- 4557US5457061AMethod of making top floating-gate flash EEPROM structureUNITED MICROELECTRONICS CORP·Filed 1994·Granted Oct 10, 1995·15 cites·9 claims
- 4656US7074674B1Method for manufacturing one-time electrically programmable read only memoryPOWERCHIP SEMICONDUCTOR CORP·Filed 2005·Granted Jul 11, 2006·1 cites·17 claims
- 4755US6603167B2Capacitor with lower electrode located at the same level as an interconnect lineSILICON INTEGRATED SYS CORP·Filed 2002·Granted Aug 5, 2003·6 cites·15 claims
- 4855US6512260B2Metal capacitor in damascene structuresSILICON INTEGRATED SYS CORP·Filed 2002·Granted Jan 28, 2003·8 cites·6 claims
- 4955US6504205B1Metal capacitors with damascene structuresSILICON INTEGRATED SYS CORP·Filed 2001·Granted Jan 7, 2003·6 cites·7 claims
- 5055US5665995APost passivation programmed mask ROMUNITED MICROELECTRONICS CORP·Filed 1995·Granted Sep 9, 1997·13 cites·15 claims
Showing the top 50 of 109 patent records by PatentIndex Score.
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