Inventor · disambiguated record
Konstantin V. Loiko
Also filed as: LOIKO KONSTANTIN V
27 granted patents·1 pending application·225 citations·filing 1997–2016
96Inventor score
Files withFREESCALE SEMICONDUCTOR INC12LOIKO KONSTANTIN V7CHARTERED SEMICONDUCTOR MFG4WINSTEAD BRIAN A3HONG CHEONG MIN1
Top patents by PatentIndex Score
28 records- 0193US7821055B2Stressed semiconductor device and method for makingFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted Oct 26, 2010·37 cites·20 claims
- 0293US7811886B2Split-gate thin film storage NVM cell with reduced load-up/trap-up effectsFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Oct 12, 2010·33 cites·18 claims
- 0393US7521314B2Method for selective removal of a layerFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Apr 21, 2009·29 cites·19 claims
- 0492US7985649B1Method of making a semiconductor structure useful in making a split gate non-volatile memory cellFREESCALE SEMICONDUCTOR INC·Filed 2010·Granted Jul 26, 2011·18 cites·15 claims
- 0591US7799650B2Method for making a transistor with a stressorFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Sep 21, 2010·27 cites·16 claims
- 0680US8035156B2Split-gate non-volatile memory cell and methodFREESCALE SEMICONDUCTOR INC·Filed 2008·Granted Oct 11, 2011·8 cites·18 claims
- 0776US9343314B2Split gate nanocrystal memory integrationLOIKO KONSTANTIN V·Filed 2014·Granted May 17, 2016·4 cites·13 claims
- 0876US7960243B2Method of forming a semiconductor device featuring a gate stressor and semiconductor deviceFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Jun 14, 2011·4 cites·20 claims
- 0973US8587039B2Method of forming a semiconductor device featuring a gate stressor and semiconductor deviceWINSTEAD BRIAN A·Filed 2011·Granted Nov 19, 2013·2 cites·19 claims
- 1072US9202930B2Memory with discrete storage elementsLOIKO KONSTANTIN V·Filed 2011·Granted Dec 1, 2015·3 cites·10 claims
- 1172US9111867B2Split gate nanocrystal memory integrationFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Aug 18, 2015·3 cites·14 claims
- 1272US8962416B1Split gate non-volatile memory cellWINSTEAD BRIAN A·Filed 2013·Granted Feb 24, 2015·3 cites·20 claims
- 1370US8766362B2Shallow trench isolation for SOI structures combining sidewall spacer and bottom linerLOIKO KONSTANTIN V·Filed 2012·Granted Jul 1, 2014·2 cites·19 claims
- 1470US6249035B1LOCOS mask for suppression of narrow space field oxide thinning and oxide punch through effectCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jun 19, 2001·17 cites·3 claims
- 1568US9548314B1Method of making a non-volatile memory (NVM) with trap-up reductionFREESCALE SEMICONDUCTOR INC·Filed 2015·Granted Jan 17, 2017·2 cites·20 claims
- 1668US8236638B2Shallow trench isolation for SOI structures combining sidewall spacer and bottom linerLOIKO KONSTANTIN V·Filed 2007·Granted Aug 7, 2012·3 cites·23 claims
- 1761US7960267B2Method for making a stressed non-volatile memory deviceFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted Jun 14, 2011·2 cites·19 claims
- 1857US8962410B2Transistors with different threshold voltagesZHANG DA·Filed 2011·Granted Feb 24, 2015·1 cites·17 claims
- 1955US9397176B2Method of forming split gate memory with improved reliabilityHONG CHEONG MIN·Filed 2014·Granted Jul 19, 2016·0 cites·19 claims
- 2051US9847397B2Method of forming split gate memory with improved reliabilityFREESCALE SEMICONDUCTOR INC·Filed 2016·Granted Dec 19, 2017·0 cites·19 claims
- 2151US2014299935A1Shallow trench isolation for soi structures combining sidewall spacer and bottom linerLOIKO KONSTANTIN V·Filed 2014·Application pending·0 cites
- 2250US5894059ADislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effectCHARTERED SEMICONDUCTOR MFG·Filed 1997·Granted Apr 13, 1999·15 cites·11 claims
- 2348US9379222B2Method of making a split gate non-volatile memory (NVM) cellWINSTEAD BRIAN A·Filed 2014·Granted Jun 28, 2016·0 cites·19 claims
- 2445US6071793ALocos mask for suppression of narrow space field oxide thinning and oxide punch through effectCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted Jun 6, 2000·12 cites·14 claims
- 2544US9257445B2Method of making a split gate non-volatile memory (NVM) cell and a logic transistorLOIKO KONSTANTIN V·Filed 2014·Granted Feb 9, 2016·0 cites·20 claims
- 2642US9331160B2Split-gate non-volatile memory cells having gap protection zonesLOIKO KONSTANTIN V·Filed 2013·Granted May 3, 2016·0 cites·14 claims
- 2740US10026820B2Split gate device with doped region and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2016·Granted Jul 17, 2018·0 cites·20 claims
- 2828US6380610B1Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effectCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Apr 30, 2002·0 cites·2 claims
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