Inventor · disambiguated record
Akash V. Giri
Also filed as: GIRI AKASH · GIRI AKASH V
13 granted patents·1 pending application·12 citations·filing 2009–2022
85Inventor score
Top patents by PatentIndex Score
14 records- 0182US9298465B2Asynchronous lookahead hierarchical branch predictionBONANNO JAMES J·Filed 2012·Granted Mar 29, 2016·6 cites·7 claims
- 0278US9547495B1Pattern based branch predictionIBM·Filed 2016·Granted Jan 17, 2017·2 cites·1 claims
- 0365US9378020B2Asynchronous lookahead hierarchical branch predictionIBM·Filed 2014·Granted Jun 28, 2016·1 cites·11 claims
- 0462US12493553B2Cross-core invalidation snapshot managementIBM·Filed 2022·Granted Dec 9, 2025·0 cites·20 claims
- 0562US9304883B2Testing optimization of microprocessor table functionsIBM·Filed 2014·Granted Apr 5, 2016·2 cites·7 claims
- 0659US11907132B2Final cache directory state indicationIBM·Filed 2022·Granted Feb 20, 2024·0 cites·22 claims
- 0755US9733946B2Pattern based branch predictionIBM·Filed 2016·Granted Aug 15, 2017·0 cites·1 claims
- 0854US8533394B2Controlling simulation of a microprocessor instruction fetch unit through manipulation of instruction addressesGIRI AKASH V·Filed 2012·Granted Sep 10, 2013·1 cites·19 claims
- 0953US10248555B2Managing an effective address table in a multi-slice processorIBM·Filed 2016·Granted Apr 2, 2019·0 cites·13 claims
- 1053US10241905B2Managing an effective address table in a multi-slice processorIBM·Filed 2016·Granted Mar 26, 2019·0 cites·7 claims
- 1153US9934041B2Pattern based branch predictionIBM·Filed 2015·Granted Apr 3, 2018·0 cites·20 claims
- 1245US8478940B2Controlling simulation of a microprocessor instruction fetch unit through manipulation of instruction addressesGIRI AKASH V·Filed 2009·Granted Jul 2, 2013·0 cites·10 claims
- 1344US9760462B2Testing optimization of microprocessor table functionsIBM·Filed 2014·Granted Sep 12, 2017·0 cites·13 claims
- 1440US2020110681A1Centralized control in a distributed stimulus-based test-bench environmentIBM·Filed 2018·Application pending·0 cites
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