Inventor · disambiguated record
Larry Nesbit
Also filed as: NESBIT LARRY · NESBIT LARRY A · NESBIT LARRY ALAN
41 granted patents·4 pending applications·958 citations·filing 1981–2008
98Inventor score
Top patents by PatentIndex Score
45 records- 0198US6713835B1Method for manufacturing a multi-level interconnect structureIBM·Filed 2003·Granted Mar 30, 2004·297 cites·39 claims
- 0294US7691720B2Vertical nanotube semiconductor device structures and methods of forming the sameIBM·Filed 2007·Granted Apr 6, 2010·22 cites·17 claims
- 0394US6573137B1Single sided buried strapINFINEON TECHNOLOGIES CORP·Filed 2000·Granted Jun 3, 2003·58 cites·12 claims
- 0494US6429068B1Structure and method of fabricating embedded vertical DRAM arrays with silicided bitline and polysilicon interconnectIBM·Filed 2001·Granted Aug 6, 2002·62 cites·20 claims
- 0588US6309924B1Method of forming self-limiting polysilicon LOCOS for DRAM cellIBM·Filed 2000·Granted Oct 30, 2001·34 cites·12 claims
- 0685US6727539B2Embedded vertical DRAM arrays with silicided bitline and polysilicon interconnectIBM·Filed 2002·Granted Apr 27, 2004·26 cites·11 claims
- 0784US7585614B2Sub-lithographic imaging techniques and processesIBM·Filed 2004·Granted Sep 8, 2009·28 cites·20 claims
- 0884US7374793B2Methods and structures for promoting stable synthesis of carbon nanotubesIBM·Filed 2003·Granted May 20, 2008·31 cites·25 claims
- 0984US6509624B1Semiconductor fuses and antifuses in vertical DRAMSIBM·Filed 2000·Granted Jan 21, 2003·37 cites·11 claims
- 1081US7329567B2Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passageIBM·Filed 2005·Granted Feb 12, 2008·6 cites·26 claims
- 1181US7038299B2Selective synthesis of semiconducting carbon nanotubesIBM·Filed 2003·Granted May 2, 2006·40 cites·65 claims
- 1281US6541810B2Modified vertical MOSFET and methods of formation thereofIBM·Filed 2001·Granted Apr 1, 2003·23 cites·6 claims
- 1379US6890828B2Method for supporting a bond pad in a multilevel interconnect structure and support structure formed therebyIBM·Filed 2003·Granted May 10, 2005·26 cites·32 claims
- 1477US7211844B2Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passageIBM·Filed 2004·Granted May 1, 2007·16 cites·24 claims
- 1577US6989308B2Method of forming FinFET gates without long etchesIBM·Filed 2004·Granted Jan 24, 2006·24 cites·10 claims
- 1675US7250347B2Double-gate FETs (Field Effect Transistors)IBM·Filed 2005·Granted Jul 31, 2007·6 cites·20 claims
- 1772US7820502B2Methods of fabricating vertical carbon nanotube field effect transistors for arrangement in arrays and field effect transistors and arrays formed therebyIBM·Filed 2007·Granted Oct 26, 2010·3 cites·13 claims
- 1872US7273794B2Shallow trench isolation fill by liquid phase deposition of SiO2IBM·Filed 2003·Granted Sep 25, 2007·13 cites·12 claims
- 1971US7393779B2Shrinking contact apertures through LPD oxideIBM·Filed 2005·Granted Jul 1, 2008·3 cites·20 claims
- 2070US7256114B2Process for oxide cap formation in semiconductor manufacturingIBM·Filed 2005·Granted Aug 14, 2007·3 cites·14 claims
- 2170US6620676B2Structure and methods for process integration in vertical DRAM cell fabricationIBM·Filed 2001·Granted Sep 16, 2003·14 cites·10 claims
- 2270US6084276AThreshold voltage tailoring of corner of MOSFET deviceIBM·Filed 1999·Granted Jul 4, 2000·32 cites·41 claims
- 2369US7829883B2Vertical carbon nanotube field effect transistors and arraysIBM·Filed 2004·Granted Nov 9, 2010·10 cites·24 claims
- 2469US6998204B2Alternating phase mask built by additive film depositionIBM·Filed 2003·Granted Feb 14, 2006·9 cites·20 claims
- 2569US6184107B1Capacitor trench-top dielectric for self-aligned device isolationIBM·Filed 1999·Granted Feb 6, 2001·37 cites·7 claims
- 2666US6790739B2Structure and methods for process integration in vertical DRAM cell fabricationIBM·Filed 2003·Granted Sep 14, 2004·11 cites·10 claims
- 2762US5994202AThreshold voltage tailoring of the corner of a MOSFET deviceIBM·Filed 1997·Granted Nov 30, 1999·24 cites·33 claims
- 2862US4398341AMethod of fabricating a highly conductive structureIBM·Filed 1981·Granted Aug 16, 1983·23 cites·18 claims
- 2961US6686668B2Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact maskIBM·Filed 2001·Granted Feb 3, 2004·8 cites·5 claims
- 3058US7264415B2Methods of forming alternating phase shift masks having improved phase-shift toleranceIBM·Filed 2004·Granted Sep 4, 2007·4 cites·48 claims
- 3154US6875685B1Method of forming gas dielectric with support structureIBM·Filed 2003·Granted Apr 5, 2005·5 cites·20 claims
- 3253US7525156B2Shallow trench isolation fill by liquid phase deposition of SiO2IBM·Filed 2007·Granted Apr 28, 2009·0 cites·12 claims
- 3352US7851064B2Methods and structures for promoting stable synthesis of carbon nanotubesIBM·Filed 2008·Granted Dec 14, 2010·0 cites·7 claims
- 3452US6245651B1Method of simultaneously forming a line interconnect and a borderless contact to diffusionIBM·Filed 2000·Granted Jun 12, 2001·5 cites·14 claims
- 3552US2008197448A1SHALLOW TRENCH ISOLATION FILL BY LIQUID PHASE DEPOSITION OF SiO2IBM·Filed 2008·Application pending·0 cites
- 3648US7932549B2Carbon nanotube conductor for trench capacitorsIBM·Filed 2003·Granted Apr 26, 2011·7 cites·20 claims
- 3747US7994575B2Metal-oxide-semiconductor device structures with tailored dopant depth profilesIBM·Filed 2005·Granted Aug 9, 2011·0 cites·22 claims
- 3845US2008040696A1Design Structures Incorporating Shallow Trench Isolation Filled by Liquid Phase Deposition of SiO2IBM·Filed 2007·Application pending·0 cites
- 3944US5923991AMethods to prevent divot formation in shallow trench isolation areasIBM·Filed 1996·Granted Jul 13, 1999·11 cites·6 claims
- 4043US7504314B2Method for fabricating oxygen-implanted silicon on insulation type semiconductor and semiconductor formed therefromIBM·Filed 2005·Granted Mar 17, 2009·0 cites·13 claims
- 4143US2005167655A1Vertical nanotube semiconductor device structures and methods of forming the sameIBM·Filed 2004·Application pending·0 cites
- 4241US2005145838A1Vertical Carbon Nanotube Field Effect TransistorIBM·Filed 2004·Application pending·0 cites
- 4340US7951660B2Methods for fabricating a metal-oxide-semiconductor device structureIBM·Filed 2003·Granted May 31, 2011·0 cites·25 claims
- 4440US6767781B2Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact maskIBM·Filed 2003·Granted Jul 27, 2004·0 cites·18 claims
- 4535US7244980B2Line mask defined active areas for 8F2 DRAM cells with folded bit lines and deep trench patternsIBM·Filed 2004·Granted Jul 17, 2007·0 cites·7 claims
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