Inventor · disambiguated record
Sei Seung Yoon
Also filed as: YOON SEI S · YOON SEI SEUNG
104 granted patents·7 pending applications·1,304 citations·filing 1992–2018
99Inventor score
Top patents by PatentIndex Score
111 records- 0197US8144509B2Write operation for spin transfer torque magnetoresistive random access memory with reduced bit cell sizeJUNG SEONG-OOK·Filed 2008·Granted Mar 27, 2012·62 cites·29 claims
- 0296US8971096B2Wide range multiport bitcellQUALCOMM INC·Filed 2013·Granted Mar 3, 2015·37 cites·20 claims
- 0396US8482966B2Magnetic element utilizing protective sidewall passivationKANG SEUNG H·Filed 2008·Granted Jul 9, 2013·40 cites·23 claims
- 0496US7345937B2Open digit line array architecture for a memory arrayMICRON TECHNOLOGY INC·Filed 2006·Granted Mar 18, 2008·33 cites·15 claims
- 0595US9401201B1Write driver for memoryQUALCOMM INC·Filed 2015·Granted Jul 26, 2016·21 cites·18 claims
- 0695US9030863B2Read/write assist for memoriesQUALCOMM INC·Filed 2013·Granted May 12, 2015·18 cites·41 claims
- 0795US8107280B2Word line voltage control in STT-MRAMYOON SEI SEUNG·Filed 2008·Granted Jan 31, 2012·51 cites·21 claims
- 0894US9646681B1Memory cell with improved write marginQUALCOMM INC·Filed 2016·Granted May 9, 2017·18 cites·20 claims
- 0994US8027206B2Bit line voltage control in spin transfer torque magnetoresistive random access memoryQUALCOMM INC·Filed 2009·Granted Sep 27, 2011·33 cites·19 claims
- 1094US7764537B2Spin transfer torque magnetoresistive random access memory and design methodsQUALCOMM INC·Filed 2008·Granted Jul 27, 2010·31 cites·20 claims
- 1193US10446196B1Flexible power sequencing for dual-power memoryQUALCOMM INC·Filed 2018·Granted Oct 15, 2019·16 cites·20 claims
- 1293US9202555B2Write word-line assist circuitry for a byte-writeable memoryQUALCOMM INC·Filed 2012·Granted Dec 1, 2015·19 cites·20 claims
- 1393US7324394B1Single data line sensing scheme for TCCT-based memory cellsT RAM SEMICONDUCTOR INC·Filed 2006·Granted Jan 29, 2008·29 cites·13 claims
- 1492US7742329B2Word line transistor strength control for read and write in spin transfer torque magnetoresistive random access memoryQUALCOMM INC·Filed 2007·Granted Jun 22, 2010·38 cites·29 claims
- 1589US7813166B2Controlled value reference signal of resistance based memory circuitQUALCOMM INC·Filed 2008·Granted Oct 12, 2010·23 cites·19 claims
- 1689US7710183B2CMOS level shifter circuit designQUALCOMM INC·Filed 2008·Granted May 4, 2010·18 cites·5 claims
- 1789US6958931B1Bit line control and sense amplification for TCCT-based memory cellsT RAM INC·Filed 2002·Granted Oct 25, 2005·41 cites·26 claims
- 1888US8934278B2Hybrid ternary content addressable memoryQUALCOMM INC·Filed 2012·Granted Jan 13, 2015·12 cites·29 claims
- 1987US7995378B2MRAM device with shared source lineQUALCOMM INC·Filed 2007·Granted Aug 9, 2011·20 cites·14 claims
- 2087US7512025B2Open digit line array architecture for a memory arrayMICRON TECHNOLOGY INC·Filed 2008·Granted Mar 31, 2009·12 cites·25 claims
- 2185US9570192B1System and method for reducing programming voltage stress on memory cell devicesQUALCOMM INC·Filed 2016·Granted Feb 14, 2017·9 cites·27 claims
- 2285US8159864B2Data integrity preservation in spin transfer torque magnetoresistive random access memoryYOON SEI SEUNG·Filed 2008·Granted Apr 17, 2012·16 cites·20 claims
- 2384US9941881B1Apparatus and method for latching data including AND-NOR or OR-NAND gate and feedback pathsQUALCOMM INC·Filed 2017·Granted Apr 10, 2018·5 cites·14 claims
- 2484US8004880B2Read disturb reduction circuit for spin transfer torque magnetoresistive random access memoryQUALCOMM INC·Filed 2007·Granted Aug 23, 2011·17 cites·32 claims
- 2584US7979832B2Process variation tolerant memory designQUALCOMM INC·Filed 2007·Granted Jul 12, 2011·14 cites·19 claims
- 2684US6903987B2Single data line sensing scheme for TCCT-based memory cellsT RAM INC·Filed 2002·Granted Jun 7, 2005·23 cites·32 claims
- 2782US9064556B2High frequency pseudo dual port memoryQUALCOMM INC·Filed 2013·Granted Jun 23, 2015·9 cites·19 claims
- 2882US7755964B2Memory device with configurable delay trackingQUALCOMM INC·Filed 2006·Granted Jul 13, 2010·14 cites·23 claims
- 2982US6735113B2Circuit and method for implementing a write operation with TCCT-based memory cellsT RAM INC·Filed 2002·Granted May 11, 2004·30 cites·64 claims
- 3082US6079023AMulti-bank memory devices having common standby voltage generator for powering a plurality of memory array banks in response to memory array bank enable signalsSAMSUNG ELECTRONICS CO LTD·Filed 1998·Granted Jun 20, 2000·51 cites·15 claims
- 3182US5315557ASemiconductor memory device having self-refresh and back-bias circuitrySAMSUNG ELECTRONICS CO LTD·Filed 1992·Granted May 24, 1994·53 cites·7 claims
- 3281US6529423B1Internal clock signal delay circuit and method for delaying internal clock signal in semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2000·Granted Mar 4, 2003·29 cites·19 claims
- 3380US9082465B2Weak keeper circuit for memory deviceQUALCOMM INC·Filed 2013·Granted Jul 14, 2015·7 cites·33 claims
- 3478US9536578B2Apparatus and method for writing data to memory array circuitsQUALCOMM INC·Filed 2013·Granted Jan 3, 2017·6 cites·33 claims
- 3578US7277310B2Open digit line array architecture for a memory arrayMICRON TECHNOLOGY INC·Filed 2006·Granted Oct 2, 2007·7 cites·18 claims
- 3678US5781494AVoltage pumping circuit for semiconductor memory deviceSAMSUNG ELECTRIC·Filed 1996·Granted Jul 14, 1998·41 cites·7 claims
- 3777US7254074B2Open digit line array architecture for a memory arrayMICRON TECHNOLOGY INC·Filed 2005·Granted Aug 7, 2007·7 cites·34 claims
- 3876US8223567B2Memory read stability using selective prechargeABU RAHMA MOHAMED H·Filed 2008·Granted Jul 17, 2012·12 cites·14 claims
- 3975US8279659B2System and method of operating a memory deviceCHO SUNG IL·Filed 2009·Granted Oct 2, 2012·11 cites·32 claims
- 4074US9165619B2Apparatus and method for reading data from multi-bank memory circuitsQUALCOMM INC·Filed 2013·Granted Oct 20, 2015·5 cites·39 claims
- 4174US7882407B2Adapting word line pulse widths in memory systemsQUALCOMM INC·Filed 2008·Granted Feb 1, 2011·8 cites·38 claims
- 4274US6721220B2Bit line control and sense amplification for TCCT-based memory cellsT RAM INC·Filed 2002·Granted Apr 13, 2004·17 cites·53 claims
- 4374US5796293AVoltage boosting circuits having backup voltage boosting capabilitySAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted Aug 18, 1998·34 cites·10 claims
- 4473US9997208B1High-speed level shifterQUALCOMM INC·Filed 2017·Granted Jun 12, 2018·3 cites·23 claims
- 4572US8139426B2Dual power scheme in memory circuitPARK DONGKYU·Filed 2008·Granted Mar 20, 2012·10 cites·30 claims
- 4671US9324416B2Pseudo dual port memory with dual latch flip-flopQUALCOMM INC·Filed 2014·Granted Apr 26, 2016·4 cites·27 claims
- 4771US7929334B2In-situ resistance measurement for magnetic random access memory (MRAM)QUALCOMM INC·Filed 2009·Granted Apr 19, 2011·7 cites·20 claims
- 4868US8161430B2System and method of resistance based memory circuit parameter adjustmentJUNG SEONG-OOK·Filed 2008·Granted Apr 17, 2012·4 cites·41 claims
- 4968US7577785B2Content addressable memory with mixed serial and parallel searchQUALCOMM INC·Filed 2005·Granted Aug 18, 2009·6 cites·24 claims
- 5067US9082498B2N-well switching circuitQUALCOMM INC·Filed 2013·Granted Jul 14, 2015·3 cites·19 claims
Showing the top 50 of 111 patent records by PatentIndex Score.
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