Inventor · disambiguated record
Chung-Lung K. Shum
Also filed as: SHUM CHUNG-LUNG · SHUM CHUNG-LUNG K · SHUM CHUNG-LUNG KEVIN
358 granted patents·18 pending applications·1,149 citations·filing 1998–2023
99Inventor score
Top patents by PatentIndex Score
376 records- 0198US9760494B2Hybrid tracking of transaction read and write setsIBM·Filed 2015·Granted Sep 12, 2017·16 cites·9 claims
- 0297US9569338B1Fingerprint-initiated trace extractionIBM·Filed 2015·Granted Feb 14, 2017·22 cites·20 claims
- 0397US9535696B1Instruction to cancel outstanding cache prefetchesIBM·Filed 2016·Granted Jan 3, 2017·17 cites·20 claims
- 0497US9262207B2Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environmentsIBM·Filed 2015·Granted Feb 16, 2016·20 cites·5 claims
- 0596US9471313B1Flushing speculative instruction processingIBM·Filed 2015·Granted Oct 18, 2016·22 cites·19 claims
- 0695US9298626B2Managing high-conflict cache lines in transactional memory computing environmentsGLOBALFOUNDRIES INC·Filed 2013·Granted Mar 29, 2016·25 cites·17 claims
- 0795US9280448B2Controlling operation of a run-time instrumentation facility from a lesser-privileged stateIBM·Filed 2013·Granted Mar 8, 2016·25 cites·8 claims
- 0894US10671532B2Reducing cache transfer overhead in a systemIBM·Filed 2017·Granted Jun 2, 2020·7 cites·18 claims
- 0994US10061586B2Latent modification instruction for transactional executionIBM·Filed 2017·Granted Aug 28, 2018·8 cites·17 claims
- 1094US9740616B2Multi-granular cache management in multi-processor computing environmentsIBM·Filed 2015·Granted Aug 22, 2017·10 cites·16 claims
- 1194US9507717B1Multithreaded transactionsIBM·Filed 2015·Granted Nov 29, 2016·9 cites·6 claims
- 1294US9430276B2Coalescing memory transactionsIBM·Filed 2015·Granted Aug 30, 2016·10 cites·20 claims
- 1394US9262206B2Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environmentsIBM·Filed 2014·Granted Feb 16, 2016·18 cites·15 claims
- 1494US9146774B2Coalescing memory transactionsIBM·Filed 2013·Granted Sep 29, 2015·21 cites·20 claims
- 1594US7870438B2Method, system and computer program product for sampling computer system performance dataIBM·Filed 2008·Granted Jan 11, 2011·38 cites·19 claims
- 1693US9846593B2Predicting the length of a transactionIBM·Filed 2015·Granted Dec 19, 2017·9 cites·5 claims
- 1793US9760495B2Hybrid tracking of transaction read and write setsIBM·Filed 2015·Granted Sep 12, 2017·8 cites·8 claims
- 1893US9684599B2Hybrid tracking of transaction read and write setsIBM·Filed 2015·Granted Jun 20, 2017·8 cites·16 claims
- 1993US9501232B2Transactional memory operations with write-only atomicityIBM·Filed 2015·Granted Nov 22, 2016·8 cites·5 claims
- 2093US9424012B1Programmable code fingerprintIBM·Filed 2016·Granted Aug 23, 2016·9 cites·18 claims
- 2193US9361031B2Software indications and hints for coalescing memory transactionsIBM·Filed 2015·Granted Jun 7, 2016·9 cites·7 claims
- 2292US10223154B2Hint instruction for managing transactional aborts in transactional memory computing environmentsIBM·Filed 2016·Granted Mar 5, 2019·6 cites·20 claims
- 2392US10168961B2Hardware transaction transient conflict resolutionIBM·Filed 2018·Granted Jan 1, 2019·6 cites·20 claims
- 2492US9904572B2Dynamic prediction of hardware transaction resource requirementsIBM·Filed 2015·Granted Feb 27, 2018·7 cites·15 claims
- 2592US9690556B2Code optimization to enable and disable coalescing of memory transactionsIBM·Filed 2016·Granted Jun 27, 2017·7 cites·20 claims
- 2692US9582315B2Software enabled and disabled coalescing of memory transactionsIBM·Filed 2016·Granted Feb 28, 2017·7 cites·19 claims
- 2792US9250902B2Determining the status of run-time-instrumentation controlsFARRELL MARK S·Filed 2012·Granted Feb 2, 2016·17 cites·14 claims
- 2892US8041894B2Method and system for a multi-level virtual/real cache system with synonym resolutionIBM·Filed 2008·Granted Oct 18, 2011·30 cites·15 claims
- 2991US9971690B2Transactional memory operations with write-only atomicityIBM·Filed 2016·Granted May 15, 2018·6 cites·15 claims
- 3091US9921895B2Transactional memory operations with read-only atomicityIBM·Filed 2016·Granted Mar 20, 2018·6 cites·17 claims
- 3191US9348523B2Code optimization to enable and disable coalescing of memory transactionsIBM·Filed 2013·Granted May 24, 2016·11 cites·12 claims
- 3290US9600287B2Latent modification instruction for transactional executionIBM·Filed 2015·Granted Mar 21, 2017·5 cites·14 claims
- 3390US9552278B1Configurable code fingerprintIBM·Filed 2016·Granted Jan 24, 2017·5 cites·18 claims
- 3490US9547484B1Automated compiler operation verificationIBM·Filed 2016·Granted Jan 17, 2017·7 cites·17 claims
- 3590US8195924B2Early instruction text based operand store compare reject avoidanceALEXANDER KHARY J·Filed 2011·Granted Jun 5, 2012·18 cites·12 claims
- 3689US9697121B2Dynamic releasing of cache linesIBM·Filed 2015·Granted Jul 4, 2017·5 cites·11 claims
- 3789US9495138B1Scheme for verifying the effects of program optimizationsIBM·Filed 2016·Granted Nov 15, 2016·6 cites·15 claims
- 3889US9471371B2Dynamic prediction of concurrent hardware transactions resource requirements and allocationIBM·Filed 2014·Granted Oct 18, 2016·8 cites·20 claims
- 3989US9454483B2Salvaging lock elision transactions with instructions to change execution typeIBM·Filed 2015·Granted Sep 27, 2016·5 cites·10 claims
- 4089US9086974B2Centralized management of high-contention cache lines in multi-processor computing environmentsIBM·Filed 2013·Granted Jul 21, 2015·12 cites·20 claims
- 4189US8904246B2Variable acknowledge rate to reduce bus contention in presence of communication errorsBUSABA FADI Y·Filed 2012·Granted Dec 2, 2014·10 cites·20 claims
- 4289US8015362B2Method and system for handling cache coherency for self-modifying codeIBM·Filed 2008·Granted Sep 6, 2011·21 cites·10 claims
- 4388US11010298B2Reducing cache transfer overhead in a systemIBM·Filed 2020·Granted May 18, 2021·2 cites·18 claims
- 4488US10579525B2Reducing cache transfer overhead in a systemIBM·Filed 2017·Granted Mar 3, 2020·3 cites·24 claims
- 4588US9639370B1Software instructed dynamic branch history pattern adjustmentIBM·Filed 2015·Granted May 2, 2017·6 cites·16 claims
- 4688US9524196B2Adaptive process for data sharing with selection of lock elision and lockingIBM·Filed 2015·Granted Dec 20, 2016·5 cites·3 claims
- 4788US9524188B1Multithreaded transactionsIBM·Filed 2015·Granted Dec 20, 2016·4 cites·11 claims
- 4888US9442776B2Salvaging hardware transactions with instructions to transfer transaction execution controlIBM·Filed 2015·Granted Sep 13, 2016·5 cites·10 claims
- 4988US9280447B2Modifying run-time-instrumentation controls from a lesser-privileged stateFARRELL MARK S·Filed 2012·Granted Mar 8, 2016·10 cites·14 claims
- 5088US9130740B2Variable acknowledge rate to reduce bus contention in presence of communication errorsIBM·Filed 2013·Granted Sep 8, 2015·8 cites·13 claims
Showing the top 50 of 376 patent records by PatentIndex Score.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →