Inventor · disambiguated record
Jeffrey K. Whitt
Also filed as: WHITT JEFFREY · WHITT JEFFREY K
17 granted patents·2 pending applications·90 citations·filing 2000–2012
91Inventor score
Top patents by PatentIndex Score
19 records- 0178US6587813B1PCI bus system testing and verification apparatus and methodLSI LOGIC CORP·Filed 2000·Granted Jul 1, 2003·36 cites·40 claims
- 0271US7719368B1Configurable reset circuit for a phase-locked loopAGERE SYSTEMS INC·Filed 2008·Granted May 18, 2010·11 cites·21 claims
- 0367US8745457B2Methods and structure for utilizing external interfaces used during normal operation of a circuit to output test signalsSAGHI EUGENE·Filed 2012·Granted Jun 3, 2014·2 cites·18 claims
- 0466US7913124B2Apparatus and methods for capture of flow control errors in clock domain crossing data transfersLSI CORP·Filed 2008·Granted Mar 22, 2011·4 cites·18 claims
- 0565US8527815B2Method for detecting a failure in a SAS/SATA topologyWHITT JEFFREY K·Filed 2010·Granted Sep 3, 2013·4 cites·20 claims
- 0664US7646668B2Maintaining dynamic count of FIFO contents in multiple clock domainsLSI CORP·Filed 2008·Granted Jan 12, 2010·3 cites·10 claims
- 0763US7991927B2Reduction of latency in store and forward architectures utilizing multiple internal bus protocolsLSI CORP·Filed 2008·Granted Aug 2, 2011·3 cites·4 claims
- 0861US8589722B2Methods and structure for storing errors for error recovery in a hardware controllerSINYKIN JOSHUA P·Filed 2011·Granted Nov 19, 2013·2 cites·20 claims
- 0961US6851007B1Multi-channel interface controller for enabling a host to interface with one or more host devicesLSI LOGIC CORP·Filed 2001·Granted Feb 1, 2005·13 cites·18 claims
- 1057US7028233B2Characteristic image of electrical data busLSI LOGIC CORP·Filed 2003·Granted Apr 11, 2006·6 cites·20 claims
- 1154US6882952B1System and method for measuring bus frequencyLSI LOGIC CORP·Filed 2001·Granted Apr 19, 2005·4 cites·20 claims
- 1249US8176207B2System debug of input/output virtualization deviceSOLOMON RICHARD I·Filed 2008·Granted May 8, 2012·2 cites·10 claims
- 1345US2006143506A1RAID storage controller assist circuit, systems and methodsLSI LOGIC CORP·Filed 2004·Application pending·0 cites
- 1442US7082522B2Method and/or apparatus for implementing enhanced device identificationLSI LOGIC CORP·Filed 2002·Granted Jul 25, 2006·0 cites·20 claims
- 1541US8775888B2Methods and structure for correlating multiple test outputs of an integrated circuit acquired during separate instances of an eventSAGHI EUGENE·Filed 2012·Granted Jul 8, 2014·0 cites·20 claims
- 1641US8738979B2Methods and structure for correlation of test signals routed using different signaling pathwaysSMITH PAUL J·Filed 2012·Granted May 27, 2014·0 cites·20 claims
- 1740US8108574B2Apparatus and methods for translation of data formats between multiple interface typesUDELL JOHN C·Filed 2008·Granted Jan 31, 2012·0 cites·12 claims
- 1839US7773453B2FIFO peek accessLSI CORP·Filed 2008·Granted Aug 10, 2010·0 cites·6 claims
- 1933US2009248919A1Method for external fifo accelerationSZWAGRZYK JERZY·Filed 2008·Application pending·0 cites
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