Inventor · disambiguated record
Gianfranco Cerofolini
Also filed as: CEROFOLINI GIANFRANCO
22 granted patents·2 pending applications·213 citations·filing 1980–2015
94Inventor score
Files withST MICROELECTRONICS SRL14NARDUCCI DARIO3ATES COMPONENTI ELETTRON2CONSORZIO DELTA TI RES2DONEGANI GUIDO IST1
Top patents by PatentIndex Score
24 records- 0195US7834344B2Nanometric structure and corresponding manufacturing methodST MICROELECTRONICS SRL·Filed 2005·Granted Nov 16, 2010·31 cites·38 claims
- 0295US7432120B2Method for realizing a hosting structure of nanometric elementsST MICROELECTRONICS SRL·Filed 2005·Granted Oct 7, 2008·40 cites·31 claims
- 0375US7605066B2Method for realizing an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic componentsST MICROELECTRONICS SRL·Filed 2006·Granted Oct 20, 2009·6 cites·27 claims
- 0472US4277291AProcess for making CMOS field-effect transistorsATES COMPONENTI ELETTRON·Filed 1980·Granted Jul 7, 1981·35 cites·4 claims
- 0569US7492624B2Method and device for demultiplexing a crossbar non-volatile memoryST MICROELECTRONICS SRL·Filed 2007·Granted Feb 17, 2009·6 cites·23 claims
- 0667US7456508B2Hosting structure of nanometric elements and corresponding manufacturing methodST MICROELECTRONICS SRL·Filed 2005·Granted Nov 25, 2008·9 cites·37 claims
- 0761US9515244B2Seebeck/Peltier thermoelectric conversion element with parallel nanowires of conductor or semiconductor material organized in rows and columns through an insulating body and processCONSORZIO DELTA TI RES·Filed 2015·Granted Dec 6, 2016·1 cites·6 claims
- 0857US7952173B2Nanometric device with a hosting structure of nanometric elementsST MICROELECTRONICS SRL·Filed 2008·Granted May 31, 2011·0 cites·23 claims
- 0957US7692953B2Method and device for demultiplexing a crossbar non-volatile memoryST MICROELECTRONICS SRL·Filed 2009·Granted Apr 6, 2010·0 cites·24 claims
- 1057US4468852AProcess for making CMOS field-effect transistors with self-aligned guard rings utilizing special masking and ion implantationATES COMPONENTI ELETTRON·Filed 1983·Granted Sep 4, 1984·21 cites·14 claims
- 1155US6724009B2Semiconductor integrated electronic device and corresponding manufacturing methodST MICROELECTRONICS SRL·Filed 2002·Granted Apr 20, 2004·5 cites·17 claims
- 1253US7928578B2Electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic componentsST MICROELECTRONICS SRL·Filed 2009·Granted Apr 19, 2011·0 cites·43 claims
- 1348US5707899ASOI structure with a deep thin oxide layer prepared by ION implantation at high energy followed by thermal treatmentDONEGANI GUIDO IST·Filed 1994·Granted Jan 13, 1998·17 cites·1 claims
- 1447US6303472B1Process for cutting trenches in a single crystal substrateST MICROELECTRONICS SRL·Filed 1998·Granted Oct 16, 2001·16 cites·20 claims
- 1547US6087729ALow dielectric constant composite film for integrated circuits of an inorganic aerogel and an organic filler grafted to the inorganic materialSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Jul 11, 2000·14 cites·9 claims
- 1646US7945867B2Method for realizing an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic componentsST MICROELECTRONICS SRL·Filed 2008·Granted May 17, 2011·0 cites·23 claims
- 1746US6890806B2Semiconductor integrated electronic device and corresponding manufacturing methodST MICROELECTRONICS SRL·Filed 2004·Granted May 10, 2005·2 cites·20 claims
- 1845US7867402B2Method for realizing a multispacer structure, use of said structure as a mold and circuital architectures obtained from said moldST MICROELECTRONICS SRL·Filed 2006·Granted Jan 11, 2011·0 cites·24 claims
- 1945US2013037070A1Seebeck/peltier thermoelectric conversion element with parallel nanowires of conductor or semiconductor material organized in rows and columns through an insulating body and processCONSORZIO DELTA TI RES·Filed 2010·Application pending·0 cites
- 2044US9269881B2Seebeck/peltier thermoelectric conversion device having phonon confinement layers of crystalline semiconductor containing angstrom-sized organic groups as semiconductor atoms substituents within the crystal lattice and fabrication processNARDUCCI DARIO·Filed 2012·Granted Feb 23, 2016·0 cites·9 claims
- 2142US2012279542A1Seebeck/peltier thermoelectric conversion device employing a stack of alternated nanometric layers of conductive and dielectric material and fabrication processNARDUCCI DARIO·Filed 2012·Application pending·0 cites
- 2240US8358010B2Method for realizing a nanometric circuit architecture between standard electronic components and semiconductor device obtained with said methodST MICROELECTRONICS SRL·Filed 2005·Granted Jan 22, 2013·0 cites·15 claims
- 2338US4965219AMethod for the manufacturing of insulated gate field effect transistors (IGFETS) having a high response speed in high density integrated circuitsSGS MICROELETTRONICA SPA·Filed 1990·Granted Oct 23, 1990·10 cites·5 claims
- 2432US9178127B2Seebeck/peltier thermoelectric conversion device employing treated films of semiconducting material not requiring nanometric definitionNARDUCCI DARIO·Filed 2010·Granted Nov 3, 2015·0 cites·9 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →