Inventor · disambiguated record
Ronald Nick Kalla
Also filed as: KALLA RONALD · KALLA RONALD N · KALLA RONALD NICK
45 granted patents·7 pending applications·1,277 citations·filing 1989–2019
98Inventor score
Files withIBM44KALLA RONALD NICK3ARMSTRONG WILLIAM JOSEPH2ABOU-EMARA LUAI A1ARIMILLI LAKSHMINARAYANA BABA1
Top patents by PatentIndex Score
52 records- 0193US7155600B2Method and logical apparatus for switching between single-threaded and multi-threaded execution states in a simultaneous multi-threaded (SMT) processorIBM·Filed 2003·Granted Dec 26, 2006·86 cites·16 claims
- 0292US7051221B2Performance throttling for temperature reduction in a microprocessorIBM·Filed 2003·Granted May 23, 2006·85 cites·20 claims
- 0392US6438671B1Generating partition corresponding real address in partitioned mode supporting systemIBM·Filed 1999·Granted Aug 20, 2002·160 cites·16 claims
- 0492US5224213APing-pong data buffer for transferring data from one data bus to another data busIBM·Filed 1989·Granted Jun 29, 1993·133 cites·1 claims
- 0591US6212667B1Integrated circuit test coverage evaluation and adjustment mechanism and methodIBM·Filed 1998·Granted Apr 3, 2001·90 cites·26 claims
- 0691US6018759AThread switch tuning tool for optimal performance in a computer processorIBM·Filed 1997·Granted Jan 25, 2000·180 cites·17 claims
- 0788US10296741B2Secure memory implementation for secure execution of virtual machinesIBM·Filed 2017·Granted May 21, 2019·4 cites·8 claims
- 0888US6993640B2Apparatus for supporting a logically partitioned computer systemIBM·Filed 2004·Granted Jan 31, 2006·44 cites·18 claims
- 0985US7949859B2Mechanism for avoiding check stops in speculative accesses while operating in real modeIBM·Filed 2008·Granted May 24, 2011·13 cites·2 claims
- 1085US7937570B2Termination of in-flight asynchronous memory moveIBM·Filed 2008·Granted May 3, 2011·14 cites·14 claims
- 1185US7827388B2Apparatus for adjusting instruction thread priority in a multi-thread processorIBM·Filed 2008·Granted Nov 2, 2010·13 cites·13 claims
- 1282US8296739B2Testing soft error rate of an application programKALLA RONALD NICK·Filed 2008·Granted Oct 23, 2012·17 cites·16 claims
- 1381US10474816B2Secure memory implementation for secure execution of Virtual MachinesIBM·Filed 2017·Granted Nov 12, 2019·2 cites·16 claims
- 1481US8281075B2Processor system and methods of triggering a block move using a system bus write command initiated by user codeARIMILLI LAKSHMINARAYANA BABA·Filed 2009·Granted Oct 2, 2012·10 cites·20 claims
- 1581US6829684B2Applications of operating mode dependent error signal generation upon real address range checking prior to translationIBM·Filed 2002·Granted Dec 7, 2004·26 cites·14 claims
- 1679US8166345B2Programming in a simultaneous multi-threaded processor environmentABOU-EMARA LUAI A·Filed 2008·Granted Apr 24, 2012·10 cites·15 claims
- 1779US6914764B2On-chip thermal sensing circuitIBM·Filed 2002·Granted Jul 5, 2005·21 cites·15 claims
- 1878US7401208B2Method and apparatus for randomizing instruction thread interleaving in a multi-thread processorIBM·Filed 2003·Granted Jul 15, 2008·23 cites·11 claims
- 1978US7013400B2Method for managing power in a simultaneous multithread processor by loading instructions into pipeline circuit during select times based on clock signal frequency and selected power modeIBM·Filed 2003·Granted Mar 14, 2006·27 cites·20 claims
- 2077US7657893B2Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processorIBM·Filed 2003·Granted Feb 2, 2010·18 cites·20 claims
- 2177US6161166AInstruction cache for multithreaded processorIBM·Filed 1999·Granted Dec 12, 2000·83 cites·20 claims
- 2276US10831889B2Secure memory implementation for secure execution of virtual machinesIBM·Filed 2019·Granted Nov 10, 2020·1 cites·20 claims
- 2376US8356151B2Reporting of partially performed memory moveIBM·Filed 2008·Granted Jan 15, 2013·7 cites·15 claims
- 2476US7360062B2Method and apparatus for selecting an instruction thread for processing in a multi-thread processorIBM·Filed 2003·Granted Apr 15, 2008·21 cites·10 claims
- 2572US7370177B2Mechanism for avoiding check stops in speculative accesses while operating in real modeIBM·Filed 2003·Granted May 6, 2008·15 cites·3 claims
- 2672US5471626AVariable stage entry/exit instruction pipelineIBM·Filed 1992·Granted Nov 28, 1995·59 cites·17 claims
- 2771US9003417B2Processor with resource usage counters for per-thread accountingARMSTRONG WILLIAM JOSEPH·Filed 2012·Granted Apr 7, 2015·2 cites·18 claims
- 2869US7469407B2Method for resource balancing using dispatch flush in a simultaneous multithread processorIBM·Filed 2003·Granted Dec 23, 2008·13 cites·5 claims
- 2969US7401207B2Apparatus and method for adjusting instruction thread priority in a multi-thread processorIBM·Filed 2003·Granted Jul 15, 2008·13 cites·6 claims
- 3066US7444547B2Method, system, and product for programming in a simultaneous multi-threaded processor environmentIBM·Filed 2003·Granted Oct 28, 2008·10 cites·8 claims
- 3166US7213135B2Method using a dispatch flush in a simultaneous multithread processor to resolve exception conditionsIBM·Filed 2003·Granted May 1, 2007·11 cites·15 claims
- 3265US7363625B2Method for changing a thread priority in a simultaneous multithread processorIBM·Filed 2003·Granted Apr 22, 2008·9 cites·2 claims
- 3362US8387065B2Speculative popcount data creationIBM·Filed 2009·Granted Feb 26, 2013·2 cites·19 claims
- 3461US6021481AEffective-to-real address cache managing apparatus and methodIBM·Filed 1997·Granted Feb 1, 2000·39 cites·11 claims
- 3560US7305586B2Accessing and manipulating microprocessor stateIBM·Filed 2003·Granted Dec 4, 2007·7 cites·15 claims
- 3659US7996564B2Remote asynchronous data moverIBM·Filed 2009·Granted Aug 9, 2011·1 cites·20 claims
- 3758US10671537B2Reducing translation latency within a memory management unit using external caching structuresIBM·Filed 2017·Granted Jun 2, 2020·0 cites·13 claims
- 3858US10649902B2Reducing translation latency within a memory management unit using external caching structuresIBM·Filed 2017·Granted May 12, 2020·0 cites·7 claims
- 3957US8145885B2Apparatus for randomizing instruction thread interleaving in a multi-thread processorKALLA RONALD NICK·Filed 2008·Granted Mar 27, 2012·1 cites·6 claims
- 4057US6981128B2Atomic quad word storage in a simultaneous multithreaded systemIBM·Filed 2003·Granted Dec 27, 2005·5 cites·9 claims
- 4156US8209698B2Processor core with per-thread resource usage accounting logicARMSTRONG WILLIAM JOSEPH·Filed 2009·Granted Jun 26, 2012·0 cites·13 claims
- 4254US8122410B2Specifying and validating untimed netsDILULLO JACK·Filed 2008·Granted Feb 21, 2012·2 cites·15 claims
- 4354US2018300256A1Maintaining agent inclusivity within a distributed mmuIBM·Filed 2017·Application pending·0 cites
- 4453US2018300255A1Maintaining agent inclusivity within a distributed mmuIBM·Filed 2017·Application pending·0 cites
- 4552US8650442B2Programming in a simultaneous multi-threaded processor environmentIBM·Filed 2012·Granted Feb 11, 2014·0 cites·12 claims
- 4652US2008109640A1Method For Changing A Thread Priority In A Simultaneous Multithread ProcessorIBM·Filed 2008·Application pending·0 cites
- 4751US8356210B2Programming in a simultaneous multi-threaded processor environment including permitting apparently exclusive access to multiple threads and disabling processor features during thread testingIBM·Filed 2012·Granted Jan 15, 2013·0 cites·14 claims
- 4849US2008162904A1Apparatus for selecting an instruction thread for processing in a multi-thread processorKALLA RONALD NICK·Filed 2008·Application pending·0 cites
- 4948US10776281B2Snoop invalidate filter for distributed memory management unit to reduce snoop invalidate latencyIBM·Filed 2018·Granted Sep 15, 2020·0 cites·19 claims
- 5044US2004216101A1Method and logical apparatus for managing resource redistribution in a simultaneous multi-threaded (SMT) processorIBM·Filed 2003·Application pending·0 cites
Showing the top 50 of 52 patent records by PatentIndex Score.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →