Inventor · disambiguated record
Yu-Ren Chen
Also filed as: CHEN YU · CHEN YU-REN · CHEN YU-REN B · CHEN YU-REN BRIAN
44 granted patents·12 pending applications·2,000 citations·filing 1994–2024
98Inventor score
Files withCHIPMOS TECHNOLOGIES INC11TAIWAN SEMICONDUCTOR MFG9CHEN YU-REN6HOLTEK SEMICONDUCTOR INC4CISCO TECH IND3
Top patents by PatentIndex Score
56 records- 0198US5555244AScalable multimedia networkINTEGRATED NETWORK CORP·Filed 1994·Granted Sep 10, 1996·725 cites·10 claims
- 0297US8847659B1Systems and method for level shiftersTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 30, 2014·31 cites·20 claims
- 0397US7642137B2Manufacturing method of chip packageCHIPMOS TECHNOLOGIES INC·Filed 2007·Granted Jan 5, 2010·83 cites·7 claims
- 0495US5673265AScalable multimedia networkINTEGRATED NETWORK CORP·Filed 1996·Granted Sep 30, 1997·281 cites·8 claims
- 0594US7927922B2Dice rearrangement package structure using layout process to form a compliant configurationCHIPMOS TECHNOLOGIES INC·Filed 2008·Granted Apr 19, 2011·30 cites·36 claims
- 0694US6272151B1Scalable multimedia networkCISCO TECH IND·Filed 1999·Granted Aug 7, 2001·199 cites·6 claims
- 0793US7932531B2Chip packageCHIPMOS TECHNOLOGIES INC·Filed 2009·Granted Apr 26, 2011·29 cites·13 claims
- 0892US5740176AScalable multimedia networkDAGAZ TECHNOLOGIES INC·Filed 1996·Granted Apr 14, 1998·210 cites·15 claims
- 0990US8916969B2Semiconductor devices, packaging methods and structuresCHEN YU-REN·Filed 2011·Granted Dec 23, 2014·14 cites·15 claims
- 1090US7663246B2Stacked chip packaging with heat sink structureCHIPMOS TECHNOLOGIES INC·Filed 2007·Granted Feb 16, 2010·22 cites·20 claims
- 1190US5799017AScalable multimedia networkCISCO TECH IND·Filed 1996·Granted Aug 25, 1998·142 cites·15 claims
- 1288US7781878B2Zigzag-stacked package structureCHIPMOS TECHNOLOGIES INC·Filed 2008·Granted Aug 24, 2010·16 cites·10 claims
- 1388US5864542AScalable multimedia networkCISCO TECH IND·Filed 1996·Granted Jan 26, 1999·129 cites·9 claims
- 1487US10302379B1Apparatus of heat pipe quality detection using infrared thermal imager and method thereofINER AEC EXECUTIVE YUAN·Filed 2017·Granted May 28, 2019·4 cites·10 claims
- 1587US8431437B2Packaging method involving rearrangement of diceCHEN YU-REN·Filed 2011·Granted Apr 30, 2013·8 cites·16 claims
- 1685US8943454B1In-phase grouping for voltage-dependent design ruleTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jan 27, 2015·10 cites·18 claims
- 1781US7561110B2Printed antenna and a wireless network device having the antennaCAMEO COMM INC·Filed 2006·Granted Jul 14, 2009·13 cites·15 claims
- 1879US11260345B2High-efficiency desiccant wheelINER AEC EXECUTIVE YUAN·Filed 2019·Granted Mar 1, 2022·2 cites·11 claims
- 1976US7532058B2Fuse option circuitHOLTEK SEMICONDUCTOR INC·Filed 2007·Granted May 12, 2009·9 cites·7 claims
- 2075US11080266B2Graph functional dependency checkingFUTUREWEI TECHNOLOGIES INC·Filed 2018·Granted Aug 3, 2021·2 cites·20 claims
- 2175US10269747B2Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2012·Granted Apr 23, 2019·4 cites·21 claims
- 2274US7700412B2Chip package structure and the method thereof with adhering the chips to a frame and forming UBM layersCHIPMOS TECHNOLOGIES INC·Filed 2008·Granted Apr 20, 2010·5 cites·14 claims
- 2373US10885118B2Incremental graph computations for querying large graphsFUTUREWEI TECHNOLOGIES INC·Filed 2018·Granted Jan 5, 2021·2 cites·20 claims
- 2470US9395739B2Common well bias design for a driving circuit and method of using sameTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jul 19, 2016·2 cites·20 claims
- 2568US10790252B2Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Sep 29, 2020·1 cites·20 claims
- 2668US7446400B2Chip package structure and fabricating method thereofCHIPMOS TECHNOLOGIES INC·Filed 2006·Granted Nov 4, 2008·4 cites·8 claims
- 2763US12129279B2Antimicrobial peptides and use of the same for treating microbial infectionsTZU CHI UNIV·Filed 2022·Granted Oct 29, 2024·0 cites·9 claims
- 2861US9013843B2Multiple device voltage electrostatic discharge clampTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted Apr 21, 2015·1 cites·20 claims
- 2961US7839335B2Antenna and wireless network device having the sameCAMEO COMM INC·Filed 2007·Granted Nov 23, 2010·3 cites·7 claims
- 3058US7919358B2Method for fabricating multi-chip stacked packageCHIPMOS TECHNOLOGIES INC·Filed 2008·Granted Apr 5, 2011·1 cites·22 claims
- 3158US7348817B2Circuit and method for generating circuit power on reset signalHOLTEK SEMICONDUCTOR INC·Filed 2006·Granted Mar 25, 2008·5 cites·18 claims
- 3257US7816957B2Power on reset generating circuit and method thereofHOLTEK SEMICONDUCTOR INC·Filed 2008·Granted Oct 19, 2010·2 cites·18 claims
- 3356US9172376B2Controlling voltage at padTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Oct 27, 2015·1 cites·20 claims
- 3456US2025172292A1Volatile organic compound burnerNATIONAL ATOMIC RES INSTITUTE·Filed 2024·Application pending·0 cites
- 3553US2009047754A1Packaging method involving rearrangement of diceCHIPMOS TECHNOLOGIES BERMUDA·Filed 2008·Application pending·0 cites
- 3651US8928361B1Common well bias design for a driving circuit and method of usingTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jan 6, 2015·0 cites·20 claims
- 3751US2008290478A1Lead-frame array package structure and methodCHEN YU-REN·Filed 2008·Application pending·0 cites
- 3849US8426245B2Packaging method involving rearrangement of diceCHEN YU-REN·Filed 2011·Granted Apr 23, 2013·0 cites·14 claims
- 3949US7509184B2Tape-out form generation methods and systemsTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Mar 24, 2009·0 cites·31 claims
- 4047US10649994B2Bounded query rewriting using viewsFUTUREWEI TECHNOLOGIES INC·Filed 2018·Granted May 12, 2020·0 cites·20 claims
- 4146US7888783B2Chip package structure and the method thereof with adhering the chips to a frame and forming UBM layersCHIPMOS TECHNOLOGIES INC·Filed 2010·Granted Feb 15, 2011·0 cites·5 claims
- 4246US2011163426A1Dice Rearrangement Package Structure Using Layout Process to Form a Compliant ConfigurationSHEN GENG-SHIN·Filed 2011·Application pending·0 cites
- 4346US2009309209A1Die Rearrangement Package Structure and the Forming Method ThereofCHEN YU-REN·Filed 2009·Application pending·0 cites
- 4445US9866217B2Voltage level shift circuit for multiple voltage integrated circuitsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jan 9, 2018·0 cites·20 claims
- 4545US2009039533A1Adhesion structure for a package apparatusCHIPMOS TECHNOLOGIES BERMUDA I·Filed 2008·Application pending·0 cites
- 4645US2009189296A1Flip chip quad flat non-leaded package structure and manufacturing method thereof and chip package structureCHIPMOS TECHNOLOGIES INC·Filed 2008·Application pending·0 cites
- 4745US2009072361A1Multi-Chip Stacked Package StructureSHEN GENG-SHIN·Filed 2008·Application pending·0 cites
- 4843US8860489B2Voltage level shift circuit for multiple voltage integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Oct 14, 2014·0 cites·20 claims
- 4942US7663425B2Fuse option circuitHOLTEK SEMICONDUCTOR INC·Filed 2008·Granted Feb 16, 2010·0 cites·7 claims
- 5042US2007267756A1Integrated circuit package and multi-layer lead frame utilizedCHIPMOS TECHNOLOGIES INC·Filed 2006·Application pending·0 cites
Showing the top 50 of 56 patent records by PatentIndex Score.
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