Inventor · disambiguated record
Shianling Wu
Also filed as: WU SHIANLING
18 granted patents·3 pending applications·311 citations·filing 1993–2012
95Inventor score
Files withSYNTEST TECHNOLOGIES INC9WANG LAUNG-TERNG6TOUBA NUR A3AT & T BELL LAB1STARDFX TECHNOLOGIES INC1
Top patents by PatentIndex Score
21 records- 0197US8522096B2Method and apparatus for testing 3D integrated circuitsWANG LAUNG-TERNG·Filed 2011·Granted Aug 27, 2013·38 cites·36 claims
- 0297US7412637B2Method and apparatus for broadcasting test patterns in a scan based integrated circuitSYNTEST TECHNOLOGIES INC·Filed 2006·Granted Aug 12, 2008·62 cites·86 claims
- 0393US7945833B1Method and apparatus for pipelined scan compressionSYNTEST TECHNOLOGIES INC·Filed 2007·Granted May 17, 2011·29 cites·34 claims
- 0490US8458544B2Multiple-capture DFT system to reduce peak capture power during self-test or scan testWANG LAUNG-TERNG·Filed 2011·Granted Jun 4, 2013·7 cites·6 claims
- 0590US7231570B2Method and apparatus for multi-level scan compressionSYNTEST TECHNOLOGIES INC·Filed 2005·Granted Jun 12, 2007·21 cites·30 claims
- 0687US7512851B2Method and apparatus for shifting at-speed scan patterns in a scan-based integrated circuitSYNTEST TECHNOLOGIES INC·Filed 2004·Granted Mar 31, 2009·39 cites·46 claims
- 0786US8161441B2Robust scan synthesis for protecting soft errorsWANG LAUNG-TERNG·Filed 2009·Granted Apr 17, 2012·14 cites·16 claims
- 0886US7996741B2Method and apparatus for low-pin-count scan compressionSYNTEST TECHNOLOGIES INC·Filed 2009·Granted Aug 9, 2011·11 cites·46 claims
- 0985US8418100B2Robust scan synthesis for protecting soft errorsWANG LAUNG-TERNG·Filed 2012·Granted Apr 9, 2013·6 cites·16 claims
- 1085US7721172B2Method and apparatus for broadcasting test patterns in a scan-based integrated circuitSYNTEST TECHNOLOGIES INC·Filed 2008·Granted May 18, 2010·11 cites·26 claims
- 1183US7779322B1Compacting test responses using X-driven compactorSYNTEST TECHNOLOGIES INC·Filed 2007·Granted Aug 17, 2010·12 cites·12 claims
- 1283US7590905B2Method and apparatus for pipelined scan compressionSYNTEST TECHNOLOGIES INC·Filed 2005·Granted Sep 15, 2009·13 cites·40 claims
- 1380US8091002B2Multiple-capture DFT system to reduce peak capture power during self-test or scan testWANG LAUNG-TERNG·Filed 2010·Granted Jan 3, 2012·4 cites·6 claims
- 1473US6052808AMaintenance registers with Boundary Scan interfaceUNIV KENTUCKY RES FOUND·Filed 1997·Granted Apr 18, 2000·36 cites·21 claims
- 1570US8230282B2Method and apparatus for low-pin-count scan compressionTOUBA NUR A·Filed 2011·Granted Jul 24, 2012·2 cites·10 claims
- 1650US8335954B2Method and apparatus for low-pin-count scan compressionTOUBA NUR A·Filed 2012·Granted Dec 18, 2012·0 cites·10 claims
- 1740US2010138709A1Method and apparatus for delay fault coverage enhancementWANG LAUNG-TERNG·Filed 2009·Application pending·0 cites
- 1838US2014143623A1Method and apparatus for low-pin-count scan compressionTOUBA NUR A·Filed 2012·Application pending·0 cites
- 1936US7783940B2Apparatus for redundancy reconfiguration of faculty memoriesSYNTEST TECHNOLOGIES INC·Filed 2008·Granted Aug 24, 2010·0 cites·5 claims
- 2036US2011022907A1FPGA Test Configuration MinimizationSTARDFX TECHNOLOGIES INC·Filed 2010·Application pending·0 cites
- 2134US5332996AMethod and apparatus for all code testingAT & T BELL LAB·Filed 1993·Granted Jul 26, 1994·6 cites·9 claims
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