Inventor · disambiguated record
Hao-Jan Chao
Also filed as: CHAO HAO-JAN
10 granted patents·1 pending application·270 citations·filing 2002–2013
91Inventor score
Top patents by PatentIndex Score
11 records- 0196US7058869B2Method and apparatus for debug, diagnosis, and yield improvement of scan-based integrated circuitsSYNTEST TECHNOLOGIES INC·Filed 2004·Granted Jun 6, 2006·119 cites·34 claims
- 0294US7284175B2Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniquesSYNTEST TECHNOLOGIES INC·Filed 2006·Granted Oct 16, 2007·30 cites·27 claims
- 0393US7007213B2Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-testSYNTEST TECHNOLOGIES INC·Filed 2002·Granted Feb 28, 2006·52 cites·30 claims
- 0491US7191373B2Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniquesSYNTEST TECHNOLOGIES INC·Filed 2002·Granted Mar 13, 2007·48 cites·19 claims
- 0590US8458544B2Multiple-capture DFT system to reduce peak capture power during self-test or scan testWANG LAUNG-TERNG·Filed 2011·Granted Jun 4, 2013·7 cites·6 claims
- 0680US8091002B2Multiple-capture DFT system to reduce peak capture power during self-test or scan testWANG LAUNG-TERNG·Filed 2010·Granted Jan 3, 2012·4 cites·6 claims
- 0776US9057763B2Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-testSYNTEST TECHNOLOGIES INC·Filed 2013·Granted Jun 16, 2015·2 cites·98 claims
- 0876US9026875B2Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-testSYNTEST TECHNOLOGIES INC·Filed 2013·Granted May 5, 2015·2 cites·55 claims
- 0975US7779323B2Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-testSYNTEST TECHNOLOGIES INC·Filed 2008·Granted Aug 17, 2010·5 cites·21 claims
- 1068US8769359B2Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-testSYNTEST TECHNOLOGIES INC·Filed 2013·Granted Jul 1, 2014·1 cites·30 claims
- 1140US2010138709A1Method and apparatus for delay fault coverage enhancementWANG LAUNG-TERNG·Filed 2009·Application pending·0 cites
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