Inventor · disambiguated record
John F. Zumkehr
Also filed as: ZUMKEHR JOHN · ZUMKEHR JOHN F
24 granted patents·4 pending applications·1,257 citations·filing 1998–2007
97Inventor score
Files withINTEL CORP18MC DONNELL DOUGLAS CORP4CHANDLER JAMES E1INTEL COPRORATION1KEY CONTROL HOLDING INC1
Top patents by PatentIndex Score
28 records- 0199US6316980B1Calibrating data strobe signal using adjustable delays with feedbackINTEL CORP·Filed 2000·Granted Nov 13, 2001·142 cites·24 claims
- 0297US6622227B2Method and apparatus for utilizing write buffers in memory control/interfaceINTEL CORP·Filed 2000·Granted Sep 16, 2003·187 cites·34 claims
- 0393US6965529B2Memory bus terminationINTEL COPRORATION·Filed 2002·Granted Nov 15, 2005·110 cites·25 claims
- 0493US6901494B2Memory control translatorsINTEL CORP·Filed 2003·Granted May 31, 2005·83 cites·25 claims
- 0593US6456544B1Selective forwarding of a strobe based on a predetermined delay following a memory read commandINTEL CORP·Filed 2001·Granted Sep 24, 2002·76 cites·30 claims
- 0689US7127584B1System and method for dynamic rank specific timing adjustments for double data rate (DDR) componentsINTEL CORP·Filed 2003·Granted Oct 24, 2006·55 cites·19 claims
- 0788US7036053B2Two dimensional data eye centering for source synchronous data transfersINTEL CORP·Filed 2002·Granted Apr 25, 2006·63 cites·36 claims
- 0888US6785842B2Systems and methods for use in reduced instruction set computer processors for retrying execution of instructions resulting in errorsMC DONNELL DOUGLAS CORP·Filed 2001·Granted Aug 31, 2004·56 cites·11 claims
- 0985US6247118B1Systems and methods for transient error recovery in reduced instruction set computer processors via instruction retryMC DONNELL DOUGLAS CORP·Filed 1998·Granted Jun 12, 2001·117 cites·12 claims
- 1083US6629225B2Method and apparatus for control calibration of multiple memory modules within a memory channelINTEL CORP·Filed 2001·Granted Sep 30, 2003·36 cites·27 claims
- 1183US6617895B2Method and device for symmetrical slew rate calibrationINTEL CORP·Filed 2001·Granted Sep 9, 2003·20 cites·9 claims
- 1283US5974529ASystems and methods for control flow error detection in reduced instruction set computer processorsMC DONNELL DOUGLAS CORP·Filed 1998·Granted Oct 26, 1999·119 cites·26 claims
- 1380US6581017B2System and method for minimizing delay variation in double data rate strobesINTEL CORP·Filed 2001·Granted Jun 17, 2003·28 cites·19 claims
- 1474US6173414B1Systems and methods for reduced error detection latency using encoded dataMC DONNELL DOUGLAS CORP·Filed 1998·Granted Jan 9, 2001·72 cites·16 claims
- 1573US7729168B2Reduced signal level support for memory devicesINTEL CORP·Filed 2007·Granted Jun 1, 2010·8 cites·23 claims
- 1671US7071728B2Hybrid compensated buffer designINTEL CORP·Filed 2004·Granted Jul 4, 2006·12 cites·20 claims
- 1771US6922077B2Hybrid compensated buffer designINTEL CORP·Filed 2003·Granted Jul 26, 2005·12 cites·30 claims
- 1870US6864731B2Method and device for symmetrical slew rate calibrationINTEL CORP·Filed 2003·Granted Mar 8, 2005·10 cites·12 claims
- 1967US6918048B2System and method for delaying a strobe signal based on a slave delay base and a master delay adjustmentINTEL CORP·Filed 2001·Granted Jul 12, 2005·15 cites·30 claims
- 2066US7152008B2Calibrated differential voltage crossingINTEL CORP·Filed 2004·Granted Dec 19, 2006·13 cites·21 claims
- 2158US7623032B2Object controlled access and inventory systemKEY CONTROL HOLDING INC·Filed 2002·Granted Nov 24, 2009·8 cites·54 claims
- 2256US7095245B2Internal voltage reference for memory interfaceINTEL CORP·Filed 2003·Granted Aug 22, 2006·10 cites·38 claims
- 2353US7046062B2Method and device for symmetrical slew rate calibrationINTEL CORP·Filed 2005·Granted May 16, 2006·1 cites·2 claims
- 2445US6956775B1Write pointer error recoveryINTEL CORP·Filed 2003·Granted Oct 18, 2005·4 cites·6 claims
- 2538US2006129866A1Test validation of an integrated deviceCHANDLER JAMES E·Filed 2006·Application pending·0 cites
- 2636US2009080266A1Double data rate (ddr) low power idle mode through reference offsetZUMKEHR JOHN F·Filed 2007·Application pending·0 cites
- 2735US2003120989A1Method and circuit to implement double data rate testingFiled 2001·Application pending·0 cites
- 2833US2004093388A1Test validation of an integrated deviceFiled 2002·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →