Inventor · disambiguated record
John Steven Dodson
Also filed as: DODSON JOHN · DODSON JOHN S · DODSON JOHN STEVEN
238 granted patents·9 pending applications·6,076 citations·filing 1994–2018
99Inventor score
Top patents by PatentIndex Score
247 records- 0196US9684461B1Dynamically adjusting read data return sizes based on memory interface bus utilizationIBM·Filed 2016·Granted Jun 20, 2017·20 cites·17 claims
- 0296US6748518B1Multi-level multiprocessor speculation mechanismIBM·Filed 2000·Granted Jun 8, 2004·142 cites·6 claims
- 0394US6691220B1Multiprocessor speculation mechanism via a barrier speculation flagIBM·Filed 2000·Granted Feb 10, 2004·101 cites·14 claims
- 0492US6880073B2Speculative execution of instructions and processes before completion of preceding barrier operationsIBM·Filed 2000·Granted Apr 12, 2005·78 cites·26 claims
- 0592US6625660B1Multiprocessor speculation mechanism for efficiently managing multiple barrier operationsIBM·Filed 2000·Granted Sep 23, 2003·74 cites·14 claims
- 0691US9892066B1Dynamically adjusting read data return sizes based on interconnect bus utilizationIBM·Filed 2016·Granted Feb 13, 2018·7 cites·18 claims
- 0791US9430418B2Synchronization and order detection in a memory systemIBM·Filed 2013·Granted Aug 30, 2016·11 cites·17 claims
- 0891US6963967B1System and method for enabling weak consistent storage advantage to a firmly consistent storage architectureIBM·Filed 2000·Granted Nov 8, 2005·71 cites·9 claims
- 0991US6754782B2Decentralized global coherency management in a multi-node computer systemIBM·Filed 2001·Granted Jun 22, 2004·71 cites·24 claims
- 1091US6615322B2Two-stage request protocol for accessing remote memory data in a NUMA data processing systemIBM·Filed 2001·Granted Sep 2, 2003·70 cites·15 claims
- 1191US6609192B1System and method for asynchronously overlapping storage barrier operations with old and new storage operationsIBM·Filed 2000·Granted Aug 19, 2003·70 cites·9 claims
- 1290US9495231B2Reestablishing synchronization in a memory systemIBM·Filed 2016·Granted Nov 15, 2016·6 cites·1 claims
- 1389US6704843B1Enhanced multiprocessor response bus protocol enabling intra-cache line reference exchangeIBM·Filed 2000·Granted Mar 9, 2004·59 cites·21 claims
- 1488US6760817B2Method and system for prefetching utilizing memory initiated prefetch write operationsIBM·Filed 2001·Granted Jul 6, 2004·52 cites·22 claims
- 1588US6711652B2Non-uniform memory access (NUMA) data processing system that provides precise notification of remote deallocation of modified dataIBM·Filed 2001·Granted Mar 23, 2004·53 cites·17 claims
- 1688US6658538B2Non-uniform memory access (NUMA) data processing system having a page table including node-specific data storage and coherency controlIBM·Filed 2001·Granted Dec 2, 2003·52 cites·14 claims
- 1788US6601144B1Dynamic cache management in a symmetric multiprocessor system via snoop operation sequence analysisIBM·Filed 2000·Granted Jul 29, 2003·53 cites·36 claims
- 1887US9594647B2Synchronization and order detection in a memory systemIBM·Filed 2016·Granted Mar 14, 2017·4 cites·1 claims
- 1987US9058260B2Transient condition management utilizing a posted error detection processing protocolIBM·Filed 2013·Granted Jun 16, 2015·8 cites·10 claims
- 2087US6901485B2Memory directory management in a multi-node computer systemIBM·Filed 2001·Granted May 31, 2005·46 cites·23 claims
- 2187US6633959B2Non-uniform memory access (NUMA) data processing system that provides notification of remote deallocation of shared dataIBM·Filed 2001·Granted Oct 14, 2003·50 cites·11 claims
- 2286US6606702B1Multiprocessor speculation mechanism with imprecise recycling of storage operationsIBM·Filed 2000·Granted Aug 12, 2003·45 cites·12 claims
- 2386US6571322B2Multiprocessor computer system with sectored cache line mechanism for cache interventionIBM·Filed 2000·Granted May 27, 2003·45 cites·14 claims
- 2486US5895495ADemand-based larx-reserve protocol for SMP system busesIBM·Filed 1997·Granted Apr 20, 1999·121 cites·20 claims
- 2585US8775906B2Efficient storage of meta-bits within a system memoryDODSON JOHN S·Filed 2012·Granted Jul 8, 2014·8 cites·7 claims
- 2685US6629210B1Intelligent cache management mechanism via processor access sequence analysisIBM·Filed 2000·Granted Sep 30, 2003·42 cites·16 claims
- 2784US5613153ACoherency and synchronization mechanisms for I/O channel controllers in a data processing systemIBM·Filed 1994·Granted Mar 18, 1997·96 cites·13 claims
- 2883US6763433B1High performance cache intervention mechanism for symmetric multiprocessor systemsIBM·Filed 2000·Granted Jul 13, 2004·36 cites·19 claims
- 2982US6801984B2Imprecise snooping based invalidation mechanismIBM·Filed 2001·Granted Oct 5, 2004·34 cites·26 claims
- 3082US6721856B1Enhanced cache management mechanism via an intelligent system bus monitorIBM·Filed 2000·Granted Apr 13, 2004·33 cites·18 claims
- 3182US6393528B1Optimized cache allocation algorithm for multiple speculative requestsIBM·Filed 1999·Granted May 21, 2002·97 cites·21 claims
- 3281US6725340B1Mechanism for folding storage barrier operations in a multiprocessor systemIBM·Filed 2000·Granted Apr 20, 2004·31 cites·9 claims
- 3379US9128834B2Implementing memory module communications with a host processor in multiported memory configurationsIBM·Filed 2013·Granted Sep 8, 2015·5 cites·10 claims
- 3479US8909874B2Memory reorder queue biasing preceding high latency operationsBRITTAIN MARK A·Filed 2012·Granted Dec 9, 2014·5 cites·14 claims
- 3579US6615321B2Mechanism for collapsing store misses in an SMP computer systemIBM·Filed 2001·Granted Sep 2, 2003·26 cites·16 claims
- 3679US6587924B2Scarfing within a hierarchical memory architectureIBM·Filed 2001·Granted Jul 1, 2003·27 cites·17 claims
- 3779US6470427B1Programmable agent and method for managing prefetch queuesIBM·Filed 1999·Granted Oct 22, 2002·82 cites·20 claims
- 3877US6760809B2Non-uniform memory access (NUMA) data processing system having remote memory cache incorporated within system memoryIBM·Filed 2001·Granted Jul 6, 2004·23 cites·15 claims
- 3977US6728873B1System and method for providing multiprocessor speculation within a speculative branch pathIBM·Filed 2000·Granted Apr 27, 2004·24 cites·13 claims
- 4077US6192458B1High performance cache directory addressing scheme for variable cache sizes utilizing associativityIBM·Filed 1998·Granted Feb 20, 2001·78 cites·22 claims
- 4177US6018791AApparatus and method of maintaining cache coherency in a multi-processor computer system with global and local recently read statesIBM·Filed 1998·Granted Jan 25, 2000·78 cites·6 claims
- 4277US5974507AOptimizing a cache eviction mechanism by selectively introducing different levels of randomness into a replacement algorithmIBM·Filed 1997·Granted Oct 26, 1999·76 cites·17 claims
- 4376US9378144B2Modification of prefetch depth based on high latency eventIBM·Filed 2013·Granted Jun 28, 2016·3 cites·8 claims
- 4476US6763434B2Data processing system and method for resolving a conflict between requests to modify a shared cache lineIBM·Filed 2000·Granted Jul 13, 2004·22 cites·22 claims
- 4576US6345342B1Cache coherency protocol employing a read operation including a programmable flag to indicate deallocation of an intervened cache lineIBM·Filed 1999·Granted Feb 5, 2002·75 cites·16 claims
- 4676US6006311ADynamic updating of repair mask used for cache defect avoidanceIBM·Filed 1997·Granted Dec 21, 1999·74 cites·14 claims
- 4775US6058456ASoftware-managed programmable unified/split caching mechanism for instructions and dataIBM·Filed 1997·Granted May 2, 2000·70 cites·10 claims
- 4874US8862944B2Isolation of faulty links in a transmission mediumDODSON JOHN S·Filed 2010·Granted Oct 14, 2014·4 cites·21 claims
- 4974US6587926B2Incremental tag build for hierarchical memory architectureIBM·Filed 2001·Granted Jul 1, 2003·19 cites·12 claims
- 5074US6212605B1Eviction override for larx-reserved addressesIBM·Filed 1997·Granted Apr 3, 2001·67 cites·15 claims
Showing the top 50 of 247 patent records by PatentIndex Score.
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