P

Inventor

SCHLANSKER MICHAEL S

US32 patents
⚠️ This page may combine multiple inventors who share the name “SCHLANSKER MICHAEL S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HEWLETT PACKARD CO

14 patents
US6385757B1May 7, 2002

Auto design of VLIW processors

HEWLETT PACKARD CO120 citations99
US6457173B1Sep 24, 2002

Automatic design of VLIW instruction formats

HEWLETT PACKARD CO125 citations98
US6408428B1Jun 18, 2002

Automated design of processor systems using feedback from internal measurements of candidate systems

HEWLETT PACKARD CO161 citations98
US5920716AJul 6, 1999

Compiling a predicated code with direct analysis of the predicated code

HEWLETT PACKARD CO96 citations98
US5778219AJul 7, 1998

Method and system for propagating exception status in data registers and for detecting exceptions from speculative operations with non-speculative operations

HEWLETT PACKARD CO68 citations96
US5692169ANov 25, 1997

Method and system for deferring exceptions generated during speculative execution

HEWLETT PACKARD CO56 citations96
US5404484AApr 4, 1995

Cache system for reducing memory latency times

HEWLETT PACKARD CO63 citations96
US5999738ADec 7, 1999

Flexible scheduling of non-speculative instructions

HEWLETT PACKARD CO22 citations92
US5850553ADec 15, 1998

Reducing the number of executed branch instructions in a code sequence

HEWLETT PACKARD CO35 citations92
US5710912AJan 20, 1998

Method and apparatus for enabling a computer system to adjust for latency assumptions

HEWLETT PACKARD CO26 citations92
US5664135ASep 2, 1997

Apparatus and method for reducing delays due to branches

HEWLETT PACKARD CO39 citations92
US5475823ADec 12, 1995

Memory processor that prevents errors when load instructions are moved in the execution sequence

HEWLETT PACKARD CO34 citations92
US5276826AJan 4, 1994

Apparatus for transforming addresses to provide pseudo-random access to memory modules

HEWLETT PACKARD CO36 citations92
US5615386AMar 25, 1997

Computer architecture for reducing delays due to branch instructions

HEWLETT PACKARD CO37 citations89

HEWLETT PACKARD DEVELOPMENT CO

13 patents
US6651222B2Nov 18, 2003

Automatic design of VLIW processors

HEWLETT PACKARD DEVELOPMENT CO45 citations96
US7296136B1Nov 13, 2007

Methods and systems for loading data from memory

HEWLETT PACKARD DEVELOPMENT CO40 citations92
US6993639B2Jan 31, 2006

Processing instruction addressed by received remote instruction and generating remote instruction to respective output port for another cell

HEWLETT PACKARD DEVELOPMENT CO21 citations92
US6952816B2Oct 4, 2005

Methods and apparatus for digital circuit design generation

HEWLETT PACKARD DEVELOPMENT CO57 citations92
US6581187B2Jun 17, 2003

Automatic design of VLIW processors

HEWLETT PACKARD DEVELOPMENT CO27 citations92
US7725556B1May 25, 2010

Computer system with concurrent direct memory access

HEWLETT PACKARD DEVELOPMENT CO24 citations90
US7086038B2Aug 1, 2006

System and method for creating systolic solvers

HEWLETT PACKARD DEVELOPMENT CO39 citations89
US7984242B2Jul 19, 2011

Program thread syncronization

HEWLETT PACKARD DEVELOPMENT CO10 citations82
US7555607B2Jun 30, 2009

Program thread syncronization for instruction cachelines

HEWLETT PACKARD DEVELOPMENT CO12 citations82
US7146480B2Dec 5, 2006

Configurable memory system

HEWLETT PACKARD DEVELOPMENT CO8 citations74
US7194609B2Mar 20, 2007

Branch reconfigurable systems and methods

HEWLETT PACKARD DEVELOPMENT CO3 citations63
US7000091B2Feb 14, 2006

System and method for independent branching in systems with plural processing elements

HEWLETT PACKARD DEVELOPMENT CO2 citations63
US7788437B2Aug 31, 2010

Computer system with network interface retransmit

HEWLETT PACKARD DEVELOPMENT CO6 citations61

SCHLANSKER MICHAEL S

3 patents

SAMSUNG ELECTRONICS CO LTD

1 patent

MAHADEVAN PRIYA

1 patent