Inventor
KONDAPALLI VENU M
US32 patents
Patents
32 patentsUS7284226B1Oct 16, 2007
Methods and structures of providing modular integrated circuits
XILINX INC274 citations99
US7075333B1Jul 11, 2006
Programmable circuit optionally configurable as a lookup table or a wide multiplexer
XILINX INC159 citations99
US6998872B1Feb 14, 2006
Lookup table circuit optionally configurable as two or more smaller lookup tables with independent inputs
XILINX INC252 citations99
US7804719B1Sep 28, 2010
Programmable logic block having reduced output delay during RAM write processes when programmed to function in RAM mode
XILINX INC80 citations98
US7116131B1Oct 3, 2006
High performance programmable logic devices utilizing dynamic circuitry
XILINX INC107 citations98
US6441641B1Aug 27, 2002
Programmable logic device with partial battery backup
XILINX INC113 citations98
US6366117B1Apr 2, 2002
Nonvolatile/battery-backed key in PLD
XILINX INC126 citations98
US5958026ASep 28, 1999
Input/output buffer supporting multiple I/O standards
XILINX INC96 citations98
US7061271B1Jun 13, 2006
Six-input look-up table for use in a field programmable gate array
XILINX INC58 citations96
US6768338B1Jul 27, 2004
PLD lookup table including transistors of more than one oxide thickness
XILINX INC62 citations96
US6294930B1Sep 25, 2001
FPGA with a plurality of input reference voltage levels
XILINX INC31 citations96
US6049227AApr 11, 2000
FPGA with a plurality of I/O voltage levels
XILINX INC33 citations96
US5877632AMar 2, 1999
FPGA with a plurality of I/O voltage levels
XILINX INC43 citations96
US7518396B1Apr 14, 2009
Apparatus and method for reconfiguring a programmable logic device
XILINX INC120 citations95
US6949951B1Sep 27, 2005
Integrated circuit multiplexer including transistors of more than one oxide thickness
XILINX INC21 citations93
US6768335B1Jul 27, 2004
Integrated circuit multiplexer including transistors of more than one oxide thickness
XILINX INC21 citations93
US7375552B1May 20, 2008
Programmable logic block with dedicated and selectable lookup table outputs coupled to general interconnect structure
XILINX INC26 citations92
US7283409B1Oct 16, 2007
Data monitoring for single event upset in a programmable logic device
XILINX INC22 citations92
US7265576B1Sep 4, 2007
Programmable lookup table with dual input and output terminals in RAM mode
XILINX INC19 citations92
US7215138B1May 8, 2007
Programmable lookup table with dual input and output terminals in shift register mode
XILINX INC25 citations92
US7109783B1Sep 19, 2006
Method and apparatus for voltage regulation within an integrated circuit
XILINX INC20 citations92
US6753722B1Jun 22, 2004
Method and apparatus for voltage regulation within an integrated circuit
XILINX INC27 citations92
US6448809B2Sep 10, 2002
FPGA with a plurality of input reference voltage levels
XILINX INC14 citations92
US7268587B1Sep 11, 2007
Programmable logic block with carry chains providing lookahead functions of different lengths
XILINX INC25 citations91
US7202697B1Apr 10, 2007
Programmable logic block having improved performance when functioning in shift register mode
XILINX INC17 citations84
US7075332B1Jul 11, 2006
Six-input look-up table and associated memory control circuitry for use in a field programmable gate array
XILINX INC14 citations84
US7053654B1May 30, 2006
PLD lookup table including transistors of more than one oxide thickness
XILINX INC12 citations84
US7119570B1Oct 10, 2006
Method of measuring performance of a semiconductor device and circuit for the same
XILINX INC14 citations83
US7456654B1Nov 25, 2008
Method and apparatus for a programmable level translator
XILINX INC7 citations73
US7109746B1Sep 19, 2006
Data monitoring for single event upset in a programmable logic device
XILINX INC8 citations73
US7382157B1Jun 3, 2008
Interconnect driver circuits for dynamic logic
XILINX INC2 citations63
US6204691B1Mar 20, 2001
FPGA with a plurality of input reference voltage levels grouped into sets
XILINX INC2 citations63