Inventor · disambiguated record
Christopher I. W. Norrie
Also filed as: NORRIE CHRISTOPHER I · NORRIE CHRISTOPHER I W
45 granted patents·2 pending applications·1,172 citations·filing 1991–2024
98Inventor score
Files withINTEGRATED DEVICE TECH12PMC SIERRA US INC7MICROCHIP TECH INC5MICROSEMI STORAGE SOLUTIONS (US) INC5NORRIE CHRISTOPHER I W5
Top patents by PatentIndex Score
47 records- 0199US9813080B1Layer specific LDPC decoderMICROSEMI SOLUTIONS (U S ) INC·Filed 2015·Granted Nov 7, 2017·43 cites·33 claims
- 0299US8984376B1System and method for avoiding error mechanisms in layered iterative decodingPMC SIERRA US INC·Filed 2013·Granted Mar 17, 2015·71 cites·21 claims
- 0399US8656257B1Nonvolatile memory controller with concatenated error correction codesMICHELONI RINO·Filed 2012·Granted Feb 18, 2014·69 cites·25 claims
- 0498US10230396B1Method and apparatus for layer-specific LDPC decodingMICROSEMI SOLUTIONS U S INC·Filed 2017·Granted Mar 12, 2019·35 cites·20 claims
- 0598US9128858B1Apparatus and method for adjusting a correctable raw bit error rate limit in a memory system using strong log-likelihood (LLR) valuesPMC SIERRA US INC·Filed 2013·Granted Sep 8, 2015·47 cites·27 claims
- 0698US8990661B1Layer specific attenuation factor LDPC decoderPMC SIERRA US INC·Filed 2013·Granted Mar 24, 2015·37 cites·20 claims
- 0798US8621318B1Nonvolatile memory controller with error detection for concatenated error correction codesMICHELONI RINO·Filed 2012·Granted Dec 31, 2013·113 cites·23 claims
- 0897US9450610B1High quality log likelihood ratios determined using two-index look-up tableMICROSEMI STORAGE SOLUTIONS (US) INC·Filed 2014·Granted Sep 20, 2016·55 cites·20 claims
- 0997US9397701B1System and method for lifetime specific LDPC decodingMICROSEMI STORAGE SOLUTIONS US INC·Filed 2013·Granted Jul 19, 2016·55 cites·22 claims
- 1096US9092353B1Apparatus and method based on LDPC codes for adjusting a correctable raw bit error rate limit in a memory systemPMC SIERRA US INC·Filed 2013·Granted Jul 28, 2015·33 cites·9 claims
- 1196US8707122B1Nonvolatile memory controller with two-stage error correction technique for enhanced reliabilityMICHELONI RINO·Filed 2011·Granted Apr 22, 2014·46 cites·20 claims
- 1295US9448881B1Memory controller and integrated circuit device for correcting errors in data read from memory cellsMICROSEMI STORAGE SOLUTIONS (US) INC·Filed 2015·Granted Sep 20, 2016·16 cites·7 claims
- 1394US9590656B2System and method for higher quality log likelihood ratios in LDPC decodingMICROSEMI STORAGE SOLUTIONS (US) INC·Filed 2014·Granted Mar 7, 2017·26 cites·18 claims
- 1494US9454414B2System and method for accumulating soft information in LDPC decodingMICROSEMI STORAGE SOLUTIONS (US) INC·Filed 2014·Granted Sep 27, 2016·25 cites·20 claims
- 1594US8984365B1System and method for reduced memory storage in LDPC decodingPMC SIERRA US INC·Filed 2013·Granted Mar 17, 2015·22 cites·21 claims
- 1693US8161210B1Multi-queue system and method for deskewing symbols in data streamsNORRIE CHRISTOPHER I W·Filed 2008·Granted Apr 17, 2012·36 cites·14 claims
- 1793US7995696B1System and method for deskewing data transmitted through data lanesINTEGRATED DEVICE TECH·Filed 2008·Granted Aug 9, 2011·31 cites·24 claims
- 1893US7694025B1Method and device for base address sorting and entry into base address registersINTEGRATED DEVICE TECH·Filed 2006·Granted Apr 6, 2010·37 cites·18 claims
- 1992US8935598B1System and method for adaptive check node approximation in LDPC decodingPMC SIERRA US INC·Filed 2013·Granted Jan 13, 2015·16 cites·20 claims
- 2090US9235488B2System and method for random noise generationPMC SIERRA US INC·Filed 2014·Granted Jan 12, 2016·13 cites·20 claims
- 2190US8285884B1Data aggregation system and method for deskewing data at selectable data ratesNORRIE CHRISTOPHER I W·Filed 2008·Granted Oct 9, 2012·26 cites·23 claims
- 2290US8069392B1Error correction code system and methodNORRIE CHRISTOPHER I W·Filed 2007·Granted Nov 29, 2011·24 cites·25 claims
- 2388US7454554B1Binary base address search device and methodINTEGRATED DEVICE TECH·Filed 2006·Granted Nov 18, 2008·20 cites·22 claims
- 2488US7079485B1Multiservice switching system with distributed switch fabricINTEGRATED DEVICE TECH·Filed 2001·Granted Jul 18, 2006·69 cites·18 claims
- 2587US7263097B1Programmably sliceable switch-fabric unit and methods of useINTEGRATED DEVICE TECH·Filed 2001·Granted Aug 28, 2007·31 cites·12 claims
- 2686US7181485B1Variably delayable transmission of packets between independently clocked source, intermediate, and destination circuits while maintaining orderly and timely processing in one or both of the intermediate and destination circuitsINTEGRATED DEVICE TECH·Filed 2001·Granted Feb 20, 2007·46 cites·29 claims
- 2784US7647438B1Binary base address sorting method and device with shift vectorINTEGRATED DEVICE TECH·Filed 2006·Granted Jan 12, 2010·16 cites·22 claims
- 2880US7779197B1Device and method for address matching with post matching limit check and nullificationINTEGRATED DEVICE TECH·Filed 2006·Granted Aug 17, 2010·11 cites·18 claims
- 2978US7356722B2Variably delayable transmission of packets between independently clocked source, intermediate, and destination circuits while maintaining orderly and timely processing in one or both of the intermediate and destination circuitsINTERGRATED DEVICE TECHNOLOGY·Filed 2007·Granted Apr 8, 2008·9 cites·19 claims
- 3077US7756014B1Device and method for handling catastrophic routingINTEGRATED DEVICE TECH·Filed 2007·Granted Jul 13, 2010·7 cites·28 claims
- 3176US8397144B1BCH data correction system and methodNORRIE CHRISTOPHER I W·Filed 2010·Granted Mar 12, 2013·6 cites·22 claims
- 3274US7848319B2Programmably sliceable switch-fabric unit and methods of useINTEGRATED DEVICE TECH·Filed 2007·Granted Dec 7, 2010·4 cites·12 claims
- 3367US12487828B2Processor having switch instruction circuitMICROCHIP TECH INC·Filed 2023·Granted Dec 2, 2025·0 cites·12 claims
- 3465US7634586B1Device for concurrent limit validity checkINTEGRATED DEVICE TECH·Filed 2006·Granted Dec 15, 2009·3 cites·9 claims
- 3563US8327243B1System and method for generating locator polynomialsNORRIE CHRISTOPHER I W·Filed 2010·Granted Dec 4, 2012·3 cites·24 claims
- 3662US12175116B2Method and apparatus for gather/scatter operations in a vector processorMICROCHIP TECH INC·Filed 2022·Granted Dec 24, 2024·0 cites·4 claims
- 3761US2025060901A1Methods for Gather/Scatter Operations in a Vector ProcessorMICROCHIP TECH INC·Filed 2024·Application pending·0 cites
- 3860US6748567B1Method and system for error correction over serial linkZETTACOM INC·Filed 2001·Granted Jun 8, 2004·9 cites·70 claims
- 3958US11782871B2Method and apparatus for desynchronizing execution in a vector processorMICROCHIP TECH INC·Filed 2022·Granted Oct 10, 2023·0 cites·9 claims
- 4055US6311298B1Mechanism to simplify built-in self test of a control store unitRISE TECHNOLOGY COMPANY·Filed 1999·Granted Oct 30, 2001·15 cites·35 claims
- 4148US2022342668A1System of Multiple Stacks in a Processor Devoid of an Effective Address GeneratorMICROCHIP TECH INC·Filed 2021·Application pending·0 cites
- 4247US5490255AExpedited execution of pipelined command having self-ordering operand processing requirementsAMDAHL CORP·Filed 1991·Granted Feb 6, 1996·19 cites·20 claims
- 4346US7734977B2Method and system for error correction over serial linkINTEGRATED DEVICE TECH·Filed 2004·Granted Jun 8, 2010·3 cites·14 claims
- 4439US5386549AError recovery system for recovering errors that occur in control store in a computer system employing pipeline architectureAMDAHL CORP·Filed 1992·Granted Jan 31, 1995·13 cites·3 claims
- 4533US6172623B1Efficient bit scan mechanismRISE TECHNOLOGY COMPANY·Filed 1999·Granted Jan 9, 2001·4 cites·22 claims
- 4630US6223257B1Instruction cache address generation technique having reduced delays in fetching missed dataRISE TECHNOLOGY COMPANY·Filed 1999·Granted Apr 24, 2001·2 cites·8 claims
- 4728US5408674ASystem for checking the validity of two byte operation code by mapping two byte operation codes into control memory in order to reduce memory sizeAMDAHL CORP·Filed 1992·Granted Apr 18, 1995·6 cites·10 claims
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