Inventor · disambiguated record
Jason Rotella
Also filed as: ROTELLA JASON · ROTELLA JASON E · ROTELLA JASON EDWARD
10 granted patents·2 pending applications·121 citations·filing 1999–2009
89Inventor score
Top patents by PatentIndex Score
12 records- 0186US7404163B2Static timing slacks analysis and modificationIBM·Filed 2006·Granted Jul 22, 2008·16 cites·17 claims
- 0285US6509766B1Adjustable clock multiplier and methodIBM·Filed 2001·Granted Jan 21, 2003·35 cites·20 claims
- 0377US6697277B2Content addressable memory (CAM) having a match line circuit with selectively adjustable pull-up impedancesIBM·Filed 2003·Granted Feb 24, 2004·22 cites·7 claims
- 0474US6618279B2Method and apparatus for adjusting control circuit pull-up margin for content addressable memory (CAM)IBM·Filed 2001·Granted Sep 9, 2003·19 cites·15 claims
- 0570US8015526B2Static timing slacks analysis and modificationIBM·Filed 2008·Granted Sep 6, 2011·4 cites·17 claims
- 0662US7515666B2Method for dynamically changing the frequency of clock signalsIBM·Filed 2005·Granted Apr 7, 2009·2 cites·3 claims
- 0759US7536496B2Method and apparatus for transmitting data in an integrated circuitIBM·Filed 2006·Granted May 19, 2009·2 cites·1 claims
- 0855US6127866ADelay-locked-loop (DLL) having symmetrical rising and falling clock edge type delaysINFINEON TECHNOLOGIES CORP·Filed 1999·Granted Oct 3, 2000·14 cites·14 claims
- 0949US6617986B2Area efficient, sequential gray code to thermometer code decoderIBM·Filed 2001·Granted Sep 9, 2003·7 cites·18 claims
- 1047US8416900B2Method and circuit for dynamically changing the frequency of clock signalsMILTON DAVID WILLS·Filed 2009·Granted Apr 9, 2013·0 cites·8 claims
- 1146US2008276034A1Design Structure for Transmitting Data in an Integrated CircuitHARDING W RIYON·Filed 2008·Application pending·0 cites
- 1241US2006262779A1A method and apparatus for transferring data between cores in an integrated circuitIBM·Filed 2005·Application pending·0 cites
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