Inventor

PINTO ANGELO

DE54 patents

⚠️ This page may combine multiple inventors who share the name “PINTO ANGELO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PINTO ANGELO

TEXAS INSTRUMENTS INC

Advanced CMOS using super steep retrograde wells

Advanced CMOS using super steep retrograde wells

Advanced CMOS using super steep retrograde wells

Advanced CMOS using super steep retrograde wells

Advanced CMOS using super steep retrograde wells

Programmable neuron MOSFET on SOI

Method of manufacturing a zero mask high density metal/insulator/metal capacitor

RF voltage controlled capacitor on thick-film SOI

On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits

Integrated process for high voltage and high performance silicon-on-insulator bipolar devices

Integrated process for high voltage and high performance silicon-on-insulator bipolar devices

P-i-n transit time silicon-on-insulator device

Zero mask high density metal/insulator/metal capacitor

Method and system for integrating shallow trench and deep trench isolation structures in a semiconductor device

On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits

Lateral heterojunction bipolar transistor

Bipolar junction transistor with a counterdoped collector region

Method for constructing a metal oxide semiconductor field effect transistor

Semiconductor device made by the method of producing hybrid orientnation (100) strained silicon with (110) silicon

Method to improve performance of secondary active components in an esige CMOS technology

Method of making (100) NMOS and (110) PMOS sidewall surface on the same fin orientation for multiple gate MOSFET with DSB substrate

Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates

Method of fabricating an epitaxial silicon-germanium layer and an integrated semiconductor device comprising an epitaxial arsenic in-situ doped silicon-germanium layer

Structure of semiconductor device with sinker contact region

Method for constructing a metal oxide semiconductor field effect transistor

Method for manufacturing a semiconductor device with sinker contact region

Semiconductor device with a collector contact in a depressed well-region

Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels

Integration of high-k metal gate stack into direct silicon bonding (DSB) hybrid orientation technology (HOT) pMOS process flow

Lateral heterojunction bipolar transistor

Method for manufacturing a bipolar junction transistor

Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates

Use of in-situ HCL etch to eliminate by oxidation recrystallization border defects generated during solid phase epitaxy (SPE) in the fabrication of nano-scale CMOS transistors using direct silicon bond substrate (DSB) and hybrid orientation technology (HOT)

Border region defect reduction in hybrid orientation technology (HOT) direct silicon bonded (DSB) substrates

ST MICROELECTRONICS SRL

Method of manufacturing a vertical-channel MOSFET

Method and apparatus for the selective doping of semiconductor material by ion implantation

Manufacturing process of a germanium implanted HBT bipolar transistor

PNP lateral bipolar electronic device and corresponding manufacturing process

PNP lateral bipolar electronic device

PNP lateral bipolar electronic device and corresponding manufacturing process

BABCOCK JEFFREY A

Advanced CMOS using super steep retrograde wells

Control of dopant diffusion from buried layers in bipolar integrated circuits

Advanced CMOS using super steep retrograde wells

XIONG WEIZE

Method for forming integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels

PINTO ANGELO

Method of treating urinary incontinence

Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates

QUALCOMM INC

Cell architecture for a semiconductor device

Mixed pitch track pattern