Inventor
BABCOCK JEFFREY A
DE46 patents
⚠️ This page may combine multiple inventors who share the name “BABCOCK JEFFREY A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TEXAS INSTRUMENTS INC
31 patentsUS7883977B2Feb 8, 2011
Advanced CMOS using super steep retrograde wells
TEXAS INSTRUMENTS INC124 citations99
US7655523B2Feb 2, 2010
Advanced CMOS using super steep retrograde wells
TEXAS INSTRUMENTS INC124 citations99
US7501324B2Mar 10, 2009
Advanced CMOS using super steep retrograde wells
TEXAS INSTRUMENTS INC121 citations99
US7199430B2Apr 3, 2007
Advanced CMOS using super steep retrograde wells
TEXAS INSTRUMENTS INC138 citations99
US7064399B2Jun 20, 2006
Advanced CMOS using super steep retrograde wells
TEXAS INSTRUMENTS INC148 citations99
US6407425B1Jun 18, 2002
Programmable neuron MOSFET on SOI
TEXAS INSTRUMENTS INC87 citations98
US6391707B1May 21, 2002
Method of manufacturing a zero mask high density metal/insulator/metal capacitor
TEXAS INSTRUMENTS INC62 citations96
US6465830B2Oct 15, 2002
RF voltage controlled capacitor on thick-film SOI
TEXAS INSTRUMENTS INC20 citations93
US6958523B2Oct 25, 2005
On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits
TEXAS INSTRUMENTS INC38 citations92
US6838348B2Jan 4, 2005
Integrated process for high voltage and high performance silicon-on-insulator bipolar devices
TEXAS INSTRUMENTS INC18 citations92
US6770952B2Aug 3, 2004
Integrated process for high voltage and high performance silicon-on-insulator bipolar devices
TEXAS INSTRUMENTS INC29 citations92
US6660616B2Dec 9, 2003
P-i-n transit time silicon-on-insulator device
TEXAS INSTRUMENTS INC32 citations92
US6646323B2Nov 11, 2003
Zero mask high density metal/insulator/metal capacitor
TEXAS INSTRUMENTS INC45 citations92
US10269895B2Apr 23, 2019
Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
TEXAS INSTRUMENTS INC7 citations84
US9741790B2Aug 22, 2017
Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
TEXAS INSTRUMENTS INC5 citations84
US9633995B2Apr 25, 2017
Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies
TEXAS INSTRUMENTS INC7 citations84
US9633994B2Apr 25, 2017
BICMOS device having commonly defined gate shield in an ED-CMOS transistor and base in a bipolar transistor
TEXAS INSTRUMENTS INC11 citations84
US9306013B2Apr 5, 2016
Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies
TEXAS INSTRUMENTS INC6 citations84
US7422972B2Sep 9, 2008
On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits
TEXAS INSTRUMENTS INC13 citations84
US6794237B2Sep 21, 2004
Lateral heterojunction bipolar transistor
TEXAS INSTRUMENTS INC13 citations84
US11024649B2Jun 1, 2021
Integrated circuit with resurf region biasing under buried insulator layers
TEXAS INSTRUMENTS INC0 citations62
US7217322B2May 15, 2007
Method of fabricating an epitaxial silicon-germanium layer and an integrated semiconductor device comprising an epitaxial arsenic in-situ doped silicon-germanium layer
TEXAS INSTRUMENTS INC5 citations62
US7164186B2Jan 16, 2007
Structure of semiconductor device with sinker contact region
TEXAS INSTRUMENTS INC3 citations62
US6806159B2Oct 19, 2004
Method for manufacturing a semiconductor device with sinker contact region
TEXAS INSTRUMENTS INC6 citations62
US6774455B2Aug 10, 2004
Semiconductor device with a collector contact in a depressed well-region
TEXAS INSTRUMENTS INC2 citations62
US10636815B2Apr 28, 2020
Integrated circuit with resurf region biasing under buried insulator layers
TEXAS INSTRUMENTS INC0 citations52
US10504921B2Dec 10, 2019
Integrated circuit with resurf region biasing under buried insulator layers
TEXAS INSTRUMENTS INC0 citations52
US9640611B2May 2, 2017
HV complementary bipolar transistors with lateral collectors on SOI with resurf regions under buried oxide
TEXAS INSTRUMENTS INC0 citations52
US9343459B2May 17, 2016
Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
TEXAS INSTRUMENTS INC0 citations52
US6927428B2Aug 9, 2005
Lateral heterojunction bipolar transistor
TEXAS INSTRUMENTS INC1 citations52
US12389642B2Aug 12, 2025
Semiconductor devices for high frequency applications
TEXAS INSTRUMENTS INC0 citations41
BABCOCK JEFFREY A
10 patentsUS8129246B2Mar 6, 2012
Advanced CMOS using super steep retrograde wells
BABCOCK JEFFREY A120 citations98
US8247300B2Aug 21, 2012
Control of dopant diffusion from buried layers in bipolar integrated circuits
BABCOCK JEFFREY A97 citations95
US8703568B2Apr 22, 2014
Advanced CMOS using super steep retrograde wells
BABCOCK JEFFREY A4 citations84
US8183621B2May 22, 2012
Non-volatile memory cell having a heating element and a substrate-based control gate
BABCOCK JEFFREY A1 citations62
US8207559B2Jun 26, 2012
Schottky junction-field-effect-transistor (JFET) structures and methods of forming JFET structures
BABCOCK JEFFREY A2 citations61
US8648391B2Feb 11, 2014
SiGe heterojunction bipolar transistor with an improved breakdown voltage-cutoff frequency product
BABCOCK JEFFREY A1 citations52
US8525233B1Sep 3, 2013
SiGe heterojunction bipolar transistor with a shallow out-diffused P+ emitter region
BABCOCK JEFFREY A0 citations52
US8669157B2Mar 11, 2014
Non-volatile memory cell having a heating element and a substrate-based control gate
BABCOCK JEFFREY A0 citations51
US8453494B2Jun 4, 2013
Gas detector that utilizes an electric field to assist in the collection and removal of gas molecules
BABCOCK JEFFREY A0 citations42
US8455980B2Jun 4, 2013
Schottky-clamped bipolar transistor with reduced self heating
BABCOCK JEFFREY A0 citations41
NAT SEMICONDUCTOR CORP
3 patentsUS7902013B1Mar 8, 2011
Method of forming a semiconductor die with reduced RF attenuation
NAT SEMICONDUCTOR CORP5 citations73
US7919807B1Apr 5, 2011
Non-volatile memory cell with heating element
NAT SEMICONDUCTOR CORP4 citations62
US7598575B1Oct 6, 2009
Semiconductor die with reduced RF attenuation
NAT SEMICONDUCTOR CORP3 citations62
SHAFI ZIA ALAN
2 patentsUS8728920B2May 20, 2014
Schottky diode with control gate for optimization of the on state resistance, the reverse leakage, and the reverse breakdown
SHAFI ZIA ALAN0 citations45
US8193602B2Jun 5, 2012
Schottky diode with control gate for optimization of the on state resistance, the reverse leakage, and the reverse breakdown
SHAFI ZIA ALAN0 citations45