Inventor · disambiguated record
Paul A. Reed
Also filed as: REED PAUL · REED PAUL A
20 granted patents·1 pending application·768 citations·filing 1979–2010
96Inventor score
Top patents by PatentIndex Score
21 records- 0198US4281397AVirtual ground MOS EPROM or ROM matrixTEXAS INSTRUMENTS INC·Filed 1979·Granted Jul 28, 1981·197 cites·9 claims
- 0293US8110899B2Method for incorporating existing silicon die into 3D integrated stackREED PAUL A·Filed 2006·Granted Feb 7, 2012·54 cites·18 claims
- 0388US4996641ADiagnostic mode for a cacheMOTOROLA INC·Filed 1988·Granted Feb 26, 1991·62 cites·6 claims
- 0488US4698788AMemory architecture with sub-arraysMOTOROLA INC·Filed 1985·Granted Oct 6, 1987·59 cites·5 claims
- 0585US4387447AColumn and ground select sequence in electrically programmable memoryTEXAS INSTRUMENTS INC·Filed 1980·Granted Jun 7, 1983·43 cites·12 claims
- 0679US4658381ABit line precharge on a column address changeMOTOROLA INC·Filed 1985·Granted Apr 14, 1987·36 cites·10 claims
- 0772US4344154AProgramming sequence for electrically programmable memoryTEXAS INSTRUMENTS INC·Filed 1980·Granted Aug 10, 1982·23 cites·8 claims
- 0871US4636991ASummation of address transition signalsMOTOROLA INC·Filed 1985·Granted Jan 13, 1987·27 cites·12 claims
- 0965US4630239AChip select speed-up circuit for a memoryMOTOROLA INC·Filed 1985·Granted Dec 16, 1986·20 cites·12 claims
- 1064US5130947AMemory system for reliably writing addresses with reduced power consumptionMOTOROLA INC·Filed 1990·Granted Jul 14, 1992·24 cites·8 claims
- 1164US4716550AHigh performance output driverMOTOROLA INC·Filed 1986·Granted Dec 29, 1987·21 cites·8 claims
- 1263US8645772B2System and method for managing uncertain events for communication devicesHOWARD EDWARD G·Filed 2010·Granted Feb 4, 2014·3 cites·14 claims
- 1362US5778432AMethod and apparatus for performing different cache replacement algorithms for flush and non-flush operations in response to a cache flush control bit registerMOTOROLA INC·Filed 1996·Granted Jul 7, 1998·44 cites·12 claims
- 1461US4818900APredecode and multiplex in addressing electrically programmable memoryTEXAS INSTRUMENTS INC·Filed 1982·Granted Apr 4, 1989·16 cites·16 claims
- 1560US5765199AData processor with alocate bit and method of operationMOTOROLA INC·Filed 1996·Granted Jun 9, 1998·43 cites·18 claims
- 1660US4661931AAsynchronous row and column controlMOTOROLA INC·Filed 1985·Granted Apr 28, 1987·17 cites·17 claims
- 1759US4314362APower down sequence for electrically programmable memoryTEXAS INSTRUMENTS INC·Filed 1980·Granted Feb 2, 1982·13 cites·18 claims
- 1853US5367655AMemory and associated method including an operating mode for simultaneously selecting multiple rows of cellsMOTOROLA INC·Filed 1991·Granted Nov 22, 1994·28 cites·19 claims
- 1950US5294847ALatching sense amplifierMOTOROLA INC·Filed 1992·Granted Mar 15, 1994·16 cites·15 claims
- 2047US5550774AMemory cache with low power consumption and method of operationMOTOROLA INC·Filed 1995·Granted Aug 27, 1996·22 cites·18 claims
- 2141US2007220207A1Transferring data from stacked memoryBLACK BRYAN·Filed 2006·Application pending·0 cites
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