Inventor · disambiguated record
Leon Stok
Also filed as: STOK LEON
10 granted patents·189 citations·filing 1998–2019
90Inventor score
Technology areasG06F
Top patents by PatentIndex Score
10 records- 0188US7536664B2Physical design system and methodIBM·Filed 2004·Granted May 19, 2009·44 cites·18 claims
- 0286US8473885B2Physical design system and methodCOHN JOHN M·Filed 2012·Granted Jun 25, 2013·8 cites·20 claims
- 0379US10839133B1Circuit layout similarity metric for semiconductor testsite coverageIBM·Filed 2019·Granted Nov 17, 2020·2 cites·20 claims
- 0477US8219943B2Physical design system and methodCOHN JOHN M·Filed 2009·Granted Jul 10, 2012·6 cites·24 claims
- 0577US7047163B1Method and apparatus for applying fine-grained transforms during placement synthesis interactionIBM·Filed 2000·Granted May 16, 2006·25 cites·12 claims
- 0673US7178120B2Method for performing timing closure on VLSI chips in a distributed environmentIBM·Filed 2003·Granted Feb 13, 2007·19 cites·17 claims
- 0769US6334205B1Wavefront technology mappingIBM·Filed 1999·Granted Dec 25, 2001·56 cites·11 claims
- 0862US6557159B1Method for preserving regularity during logic synthesisIBM·Filed 2000·Granted Apr 29, 2003·15 cites·17 claims
- 0950US6966046B2CMOS tapered gate and synthesis methodIBM·Filed 2001·Granted Nov 15, 2005·3 cites·8 claims
- 1034US6167557AMethod and apparatus for logic synthesis employing size independent timing optimizationIBM·Filed 1998·Granted Dec 26, 2000·11 cites·13 claims
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