Inventor · disambiguated record
Fred Session
Also filed as: SESSION FRED · SESSION FRED C
11 granted patents·233 citations·filing 1993–2018
91Inventor score
Files withFAIRCHILD SEMICONDUCTOR7DIKSHIT ROHIT1HUGHES AIRCRAFT CO1SESSION FRED1SREEKANTHAM SREEVATSA1
Top patents by PatentIndex Score
11 records- 0197US7385248B2Shielded gate field effect transistor with improved inter-poly dielectricFAIRCHILD SEMICONDUCTOR·Filed 2005·Granted Jun 10, 2008·88 cites·21 claims
- 0295US7598144B2Method for forming inter-poly dielectric in shielded gate field effect transistorFAIRCHILD SEMICONDUCTOR·Filed 2007·Granted Oct 6, 2009·32 cites·31 claims
- 0387US8044461B2Planar TMBS rectifierFAIRCHILD SEMICONDUCTOR·Filed 2010·Granted Oct 25, 2011·8 cites·7 claims
- 0486US7732842B2Structure and method for forming a planar schottky contactFAIRCHILD SEMICONDUCTOR·Filed 2007·Granted Jun 8, 2010·11 cites·29 claims
- 0585US7807536B2Low resistance gate for power MOSFET applications and method of manufactureFAIRCHILD SEMICONDUCTOR·Filed 2006·Granted Oct 5, 2010·18 cites·27 claims
- 0684US9496391B2Termination region of a semiconductor deviceFAIRCHILD SEMICONDUCTOR·Filed 2014·Granted Nov 15, 2016·5 cites·14 claims
- 0783US5435646ATemperature measurement using ion implanted wafersHUGHES AIRCRAFT CO·Filed 1993·Granted Jul 25, 1995·57 cites·16 claims
- 0881US10749027B2Methods and apparatus related to termination regions of a semiconductor deviceFAIRCHILD SEMICONDUCTOR·Filed 2018·Granted Aug 18, 2020·2 cites·17 claims
- 0974US8502313B2Double layer metal (DLM) power MOSFETDIKSHIT ROHIT·Filed 2011·Granted Aug 6, 2013·6 cites·23 claims
- 1074US8450798B2Semiconductor structure with a planar Schottky contactSESSION FRED·Filed 2011·Granted May 28, 2013·4 cites·22 claims
- 1158US8592277B2Method of forming low resistance gate for power MOSFET applicationsSREEKANTHAM SREEVATSA·Filed 2010·Granted Nov 26, 2013·2 cites·25 claims
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