Inventor · disambiguated record
Santhiran Nadarajah
Also filed as: NADARAJAH SANTHIRAN · NADARAJAH SANTHIRAN S O
22 granted patents·1 pending application·654 citations·filing 2000–2011
96Inventor score
Technology areasH10W
Top patents by PatentIndex Score
23 records- 0195US6872599B1Enhanced solder joint strength and ease of inspection of leadless leadframe package (LLP)NAT SEMICONDUCTOR CORP·Filed 2002·Granted Mar 29, 2005·94 cites·13 claims
- 0294US7023074B2Enhanced solder joint strength and ease of inspection of leadless leadframe package (LLP)NAT SEMICONDUCTOR CORP·Filed 2005·Granted Apr 4, 2006·32 cites·6 claims
- 0394US6399415B1Electrical isolation in panels of leadless IC packagesNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jun 4, 2002·145 cites·10 claims
- 0492US6452255B1Low inductance leadless packageNAT SEMICONDUCTOR CORP·Filed 2000·Granted Sep 17, 2002·103 cites·11 claims
- 0584US7419855B1Apparatus and method for miniature semiconductor packagesNAT SEMICONDUCTOR CORP·Filed 2006·Granted Sep 2, 2008·11 cites·18 claims
- 0683US6448107B1Pin indicator for leadless leadframe packagesNAT SEMICONDUCTOR CORP·Filed 2000·Granted Sep 10, 2002·39 cites·16 claims
- 0781US7227245B1Die attach pad for use in semiconductor manufacturing and method of making sameNAT SEMICONDUCTOR CORP·Filed 2004·Granted Jun 5, 2007·39 cites·16 claims
- 0880US7161232B1Apparatus and method for miniature semiconductor packagesNAT SEMICONDUCTOR CORP·Filed 2004·Granted Jan 9, 2007·26 cites·15 claims
- 0978US6686652B1Locking lead tips and die attach pad for a leadless package apparatus and methodNAT SEMICONDUCTOR CORP·Filed 2000·Granted Feb 3, 2004·31 cites·29 claims
- 1076US7186588B1Method of fabricating a micro-array integrated circuit packageNAT SEMICONDUCTOR CORP·Filed 2004·Granted Mar 6, 2007·27 cites·7 claims
- 1172US7064419B1Die attach region for use in a micro-array integrated circuit packageNAT SEMICONDUCTOR CORP·Filed 2004·Granted Jun 20, 2006·23 cites·19 claims
- 1271US7002239B1Leadless leadframe packaging panel featuring peripheral dummy leadsNAT SEMICONDUCTOR CORP·Filed 2003·Granted Feb 21, 2006·19 cites·21 claims
- 1370US7259460B1Wire bonding on thinned portions of a lead-frame configured for use in a micro-array integrated circuit packageNAT SEMICONDUCTOR CORP·Filed 2004·Granted Aug 21, 2007·21 cites·7 claims
- 1464US6677667B1Leadless leadframe package design that provides a greater structural integrityNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jan 13, 2004·11 cites·34 claims
- 1562US6576989B1Locking of mold compound to conductive substrate panelsNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jun 10, 2003·10 cites·21 claims
- 1661US7187075B1Stress relieving film for semiconductor packagesNAT SEMICONDUCTOR CORP·Filed 2004·Granted Mar 6, 2007·15 cites·21 claims
- 1756US7470978B2Sawn power package and method of fabricating sameNAT SEMICONDUCTOR CORP·Filed 2007·Granted Dec 30, 2008·1 cites·8 claims
- 1853US7342297B1Sawn power packageNAT SEMICONDUCTOR CORP·Filed 2004·Granted Mar 11, 2008·6 cites·15 claims
- 1944US6808961B1Locking of mold compound to conductive substrate panelsNAT SEMICONDUCTOR CORP·Filed 2003·Granted Oct 26, 2004·1 cites·24 claims
- 2040US6818970B1Leadless leadframe package design that provides a greater structural integrityNAT SEMICONDUCTOR CORP·Filed 2003·Granted Nov 16, 2004·0 cites·22 claims
- 2138US6963124B1Locking of mold compound to conductive substrate panelsNAT SEMICONDUCTOR CORP·Filed 2004·Granted Nov 8, 2005·0 cites·22 claims
- 2238US6933174B1Leadless leadframe package design that provides a greater structural integrityNAT SEMICONDUCTOR CORP·Filed 2004·Granted Aug 23, 2005·0 cites·27 claims
- 2337US2012290255A1Clear layer isolationKELKAR NIKHIL VISHWANATH·Filed 2011·Application pending·0 cites
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