Inventor · disambiguated record
Fernando Latorre
Also filed as: LATORRE FERNANDO
35 granted patents·12 pending applications·241 citations·filing 2004–2024
97Inventor score
Files withINTEL CORP26LATORRE FERNANDO4CONECTATE SOLUCIONES Y APLICACIONES SL3GIBERT CODINA ENRIC2LOPEZ PEDRO2
Top patents by PatentIndex Score
47 records- 0193US9971540B2Storage device and method for performing convolution operationsINTEL CORP·Filed 2015·Granted May 15, 2018·18 cites·18 claims
- 0293US9613001B2Processing device for performing convolution operationsINTEL CORP·Filed 2013·Granted Apr 4, 2017·19 cites·18 claims
- 0389US9978014B2Reconfigurable processing unitINTEL CORP·Filed 2013·Granted May 22, 2018·24 cites·24 claims
- 0488US7478198B2Multithreaded clustered microarchitecture with dynamic back-end assignmentINTEL CORP·Filed 2004·Granted Jan 13, 2009·42 cites·47 claims
- 0584US11060034B2Process and reactor for continuous charcoal productionVALLOUREC TUBOS DO BRASIL S A·Filed 2018·Granted Jul 13, 2021·2 cites·20 claims
- 0684US7895415B2Cache sharing based thread controlINTEL CORP·Filed 2007·Granted Feb 22, 2011·16 cites·6 claims
- 0783US8612698B2Replacement policy for hot code detectionLOPEZ PEDRO·Filed 2008·Granted Dec 17, 2013·16 cites·18 claims
- 0882US9280474B2Adaptive data prefetchingINTEL CORP·Filed 2013·Granted Mar 8, 2016·9 cites·21 claims
- 0982US2025111008A1Method and apparatus for distributed and cooperative computation in artificial neural networksINTEL CORP·Filed 2024·Application pending·0 cites
- 1081US8185700B2Enabling speculative state information in a cache coherency protocolGIMENO CARLOS MADRILES·Filed 2006·Granted May 22, 2012·23 cites·15 claims
- 1179US10002108B2Processing device for performing convolution operationsINTEL CORP·Filed 2017·Granted Jun 19, 2018·2 cites·15 claims
- 1278US9582432B2Instruction and logic for support of code modification in translation lookaside buffersINTEL CORP·Filed 2016·Granted Feb 28, 2017·2 cites·20 claims
- 1378US9158705B2Stride-based translation lookaside buffer (TLB) prefetching with adaptive offsetTOPP JAROSLAW·Filed 2013·Granted Oct 13, 2015·9 cites·24 claims
- 1477US8909902B2Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential executionLATORRE FERNANDO·Filed 2009·Granted Dec 9, 2014·10 cites·13 claims
- 1576US8261046B2Access of register files of other threads using synchronizationGIBERT ENRIC·Filed 2006·Granted Sep 4, 2012·12 cites·22 claims
- 1676US7313675B2Register allocation techniqueINTEL CORP·Filed 2005·Granted Dec 25, 2007·8 cites·21 claims
- 1775US8423716B2Multithreaded clustered microarchitecture with dynamic back-end assignmentLATORRE FERNANDO·Filed 2011·Granted Apr 16, 2013·3 cites·19 claims
- 1872US2023020571A1Method and apparatus for distributed and cooperative computation in artificial neural networksINTEL CORP·Filed 2022·Application pending·0 cites
- 1971US12032653B2Method and apparatus for distributed and cooperative computation in artificial neural networksINTEL CORP·Filed 2021·Granted Jul 9, 2024·0 cites·18 claims
- 2070US11636776B2Unified identification protocol in training and healthCONECTATE SOLUCIONES Y APLICACIONES SL·Filed 2019·Granted Apr 25, 2023·3 cites·19 claims
- 2168US9940138B2Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculationsLOPEZ PEDRO·Filed 2009·Granted Apr 10, 2018·5 cites·20 claims
- 2266US9811341B2Managed instruction cache prefetchingSTAVROU KYRIAKOS A·Filed 2011·Granted Nov 7, 2017·4 cites·5 claims
- 2366US9558121B2Two-level cache locking mechanismINTEL CORP·Filed 2012·Granted Jan 31, 2017·2 cites·21 claims
- 2466US9367477B2Instruction and logic for support of code modification in translation lookaside buffersINTEL CORP·Filed 2014·Granted Jun 14, 2016·1 cites·20 claims
- 2566US8190652B2Achieving coherence between dynamically optimized code and original codeLATORRE FERNANDO·Filed 2007·Granted May 29, 2012·4 cites·10 claims
- 2665US11960454B2Method of a universal registration and identification of legal proceduresCONECTATE SOLUCIONES Y APLICACIONES SL·Filed 2020·Granted Apr 16, 2024·1 cites·14 claims
- 2764US10997273B2Method and apparatus for distributed and cooperative computation in artificial neural networksINTEL CORP·Filed 2015·Granted May 4, 2021·1 cites·24 claims
- 2862US10621092B2Merging level cache and data cache units having indicator bits related to speculative executionINTEL CORP·Filed 2014·Granted Apr 14, 2020·1 cites·20 claims
- 2961US7996617B2Multithreaded clustered microarchitecture with dynamic back-end assignmentINTEL CORP·Filed 2009·Granted Aug 9, 2011·1 cites·51 claims
- 3060US10402468B2Processing device for performing convolution operationsINTEL CORP·Filed 2018·Granted Sep 3, 2019·0 cites·20 claims
- 3159US10013326B2Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code regionMARTINEZ RAUL·Filed 2011·Granted Jul 3, 2018·1 cites·18 claims
- 3259US9009413B2Method and apparatus to implement lazy flush in a virtually tagged cache memoryINTEL CORP·Filed 2012·Granted Apr 14, 2015·2 cites·22 claims
- 3353US11281965B2Reconfigurable processing unitINTEL CORP·Filed 2018·Granted Mar 22, 2022·0 cites·18 claims
- 3452US2019004916A1Profiling asynchronous events resulting from the execution of software at code region granularityINTEL CORP·Filed 2018·Application pending·0 cites
- 3551US10061587B2Instruction and logic for bulk register reclamationINTEL CORP·Filed 2014·Granted Aug 28, 2018·0 cites·20 claims
- 3644US2009327661A1Mechanisms to handle free physical register identifiers for smt out-of-order processorsSPERBER ZEEV·Filed 2008·Application pending·0 cites
- 3743US9195465B2Cache coherency and processor consistencyINTEL CORP·Filed 2012·Granted Nov 24, 2015·0 cites·18 claims
- 3843US2008163230A1Method and apparatus for selection among multiple execution threadsLATORRE FERNANDO·Filed 2006·Application pending·0 cites
- 3942US10157063B2Instruction and logic for optimization level aware branch predictionINTEL CORP·Filed 2012·Granted Dec 18, 2018·0 cites·6 claims
- 4042US2016026912A1Weight-shifting mechanism for convolutional neural networksINTEL CORP·Filed 2014·Application pending·0 cites
- 4142US2014143526A1Branch Prediction GatingXEKALAKIS POLYCHRONIS·Filed 2012·Application pending·0 cites
- 4241US9507725B2Store forwarding for data cachesINTEL CORP·Filed 2012·Granted Nov 29, 2016·0 cites·20 claims
- 4340US2012311308A1Branch Predictor with Jump Ahead Logic to Jump Over Portions of Program Code Lacking BranchesXEKALAKIS POLYCHRONIS·Filed 2011·Application pending·0 cites
- 4438US2013268735A1Support for speculative ownership without dataGIBERT CODINA ENRIC·Filed 2011·Application pending·0 cites
- 4537US2014156976A1Method, apparatus and system for selective execution of a commit instructionGIBERT CODINA ENRIC·Filed 2011·Application pending·0 cites
- 4632US2013326199A1Method and apparatus for controlling a mxcsrMAGKLIS GRIGORIOS·Filed 2011·Application pending·0 cites
- 4729US2021021423A1Procedure of unified global registration and universal identification of spatially locatable objectsCONECTATE SOLUCIONES Y APLICACIONES SL·Filed 2020·Application pending·0 cites
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