Inventor · disambiguated record
Timothy Siegel
Also filed as: SIEGEL TIMOTHY · SIEGEL TIMOTHY J · SLEGEL TIMOTHY J
20 granted patents·61 citations·filing 2003–2021
92Inventor score
Top patents by PatentIndex Score
20 records- 0189US11150905B2Efficiency for coordinated start interpretive execution exit for a multithreaded processorIBM·Filed 2017·Granted Oct 19, 2021·4 cites·9 claims
- 0289US7281115B2Method, system and program product for clearing selected storage translation buffer entriesIBM·Filed 2005·Granted Oct 9, 2007·14 cites·9 claims
- 0384US8631216B2Dynamic address translation with change record overrideGREINER DAN F·Filed 2012·Granted Jan 14, 2014·6 cites·15 claims
- 0479US7020761B2Blocking processing restrictions based on page indicesIBM·Filed 2003·Granted Mar 28, 2006·26 cites·59 claims
- 0578US9280480B2Extract target cache attribute facility and instruction thereforIBM·Filed 2013·Granted Mar 8, 2016·3 cites·18 claims
- 0677US9244856B2Dynamic address translation with translation table entry format control for identifying format of the translation table entryIBM·Filed 2013·Granted Jan 26, 2016·3 cites·20 claims
- 0776US10944423B2Verifying the correctness of a deflate compression acceleratorIBM·Filed 2019·Granted Mar 9, 2021·2 cites·6 claims
- 0873US9996472B2Extract target cache attribute facility and instruction thereforIBM·Filed 2016·Granted Jun 12, 2018·1 cites·15 claims
- 0967US10949212B2Saving and restoring machine state between multiple executions of an instructionIBM·Filed 2020·Granted Mar 16, 2021·0 cites·20 claims
- 1066US10985778B2Verifying the correctness of a deflate compression acceleratorIBM·Filed 2020·Granted Apr 20, 2021·0 cites·11 claims
- 1165US10430188B2Next instruction access intent instruction for indicating usage of a storage operand by one or more instructions subsequent to a next sequential instructionIBM·Filed 2013·Granted Oct 1, 2019·1 cites·8 claims
- 1263US11182198B2Indicator-based prioritization of transactionsIBM·Filed 2019·Granted Nov 23, 2021·0 cites·16 claims
- 1363US9507646B2Cycle-level thread alignment on multi-threaded processorsIBM·Filed 2015·Granted Nov 29, 2016·1 cites·20 claims
- 1462US11487547B2Extended asynchronous data mover functions compatibility indicationIBM·Filed 2021·Granted Nov 1, 2022·0 cites·16 claims
- 1562US11221850B2Sort and merge instruction for a general-purpose processorIBM·Filed 2020·Granted Jan 11, 2022·0 cites·20 claims
- 1659US11151267B2Move data and set storage key based on key function controlIBM·Filed 2019·Granted Oct 19, 2021·0 cites·20 claims
- 1755US9454377B2Speculative branch handling for transaction abortIBM·Filed 2016·Granted Sep 27, 2016·0 cites·1 claims
- 1848US11226839B2Maintaining compatibility for complex functions over multiple machine generationsIBM·Filed 2019·Granted Jan 18, 2022·0 cites·18 claims
- 1948US9495306B1Dynamic management of a processor state with transient cache memoryIBM·Filed 2016·Granted Nov 15, 2016·0 cites·20 claims
- 2039US11314555B2Synchronous re-execution of a data transformation operation to obtain further details regarding an exceptionIBM·Filed 2019·Granted Apr 26, 2022·0 cites·11 claims
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