Inventor · disambiguated record
Daniel Stasiak
Also filed as: STASIAK DANIEL · STASIAK DANIEL L · STASIAK DANIEL LAWRENCE
43 granted patents·8 pending applications·598 citations·filing 1989–2021
98Inventor score
Top patents by PatentIndex Score
51 records- 0193US6504212B1Method and apparatus for enhanced SOI passgate operationsIBM·Filed 2000·Granted Jan 7, 2003·85 cites·16 claims
- 0292US6429689B1Method and apparatus for controlling both active and standby power in domino circuitsIBM·Filed 2001·Granted Aug 6, 2002·46 cites·20 claims
- 0392US6002292AMethod and apparatus to control noise in a dynamic circuitIBM·Filed 1998·Granted Dec 14, 1999·77 cites·16 claims
- 0483US7233188B1Methods and apparatus for reducing power consumption in a processor using clock signal controlSONY COMPUTER ENTERTAINMENT INC·Filed 2005·Granted Jun 19, 2007·13 cites·17 claims
- 0582US7535020B2Systems and methods for thermal sensingTOSHIBA KK·Filed 2005·Granted May 19, 2009·11 cites·11 claims
- 0682US6668358B2Dual threshold gate array or standard cell power saving library circuitsIBM·Filed 2001·Granted Dec 23, 2003·41 cites·2 claims
- 0778US9804650B2Supply voltage node coupling using a switchQUALCOMM INC·Filed 2015·Granted Oct 31, 2017·3 cites·30 claims
- 0878US8020138B2Voltage island performance/leakage screen monitor for IP characterizationIBM·Filed 2008·Granted Sep 13, 2011·9 cites·8 claims
- 0978US6925549B2Asynchronous pipeline control interface using tag values to control passing data through successive pipeline stagesIBM·Filed 2000·Granted Aug 2, 2005·27 cites·15 claims
- 1077US4941120AFloating point normalization and rounding prediction circuitIBM·Filed 1989·Granted Jul 10, 1990·57 cites·4 claims
- 1176US11205620B2Method and apparatus for supplying power to VLSI silicon chipsIBM·Filed 2018·Granted Dec 21, 2021·2 cites·10 claims
- 1274US7484187B2Clock-gating through data independent logicIBM·Filed 2005·Granted Jan 27, 2009·8 cites·5 claims
- 1374US7044633B2Method to calibrate a chip with multiple temperature sensitive ring oscillators by calibrating only TSROIBM·Filed 2003·Granted May 16, 2006·12 cites·18 claims
- 1474US6934658B2Computer chip heat responsive method and apparatusIBM·Filed 2003·Granted Aug 23, 2005·20 cites·13 claims
- 1573US7343499B2Method and apparatus to generate circuit energy models with multiple clock gating inputsIBM·Filed 2005·Granted Mar 11, 2008·6 cites·4 claims
- 1671US7913201B2Structure for estimating power consumption of integrated circuitryIBM·Filed 2008·Granted Mar 22, 2011·4 cites·32 claims
- 1770US7720667B2Method and system for estimating power consumption of integrated circuitryIBM·Filed 2006·Granted May 18, 2010·5 cites·13 claims
- 1870US7605612B1Techniques for reducing power requirements of an integrated circuitIBM·Filed 2008·Granted Oct 20, 2009·6 cites·20 claims
- 1970US7346866B2Method and apparatus to generate circuit energy models with clock gatingIBM·Filed 2005·Granted Mar 18, 2008·5 cites·12 claims
- 2070US7058131B2Signal transmission system with programmable voltage referenceIBM·Filed 2001·Granted Jun 6, 2006·13 cites·17 claims
- 2170US6635518B2SOI FET and method for creating FET body connections with high-quality matching characteristics and no area penalty for partially depleted SOI technologiesIBM·Filed 2001·Granted Oct 21, 2003·15 cites·8 claims
- 2270US6326814B1Method and apparatus for enhancing noise tolerance in dynamic silicon-on-insulator logic gatesIBM·Filed 2000·Granted Dec 4, 2001·16 cites·16 claims
- 2369US6329846B1Cross-coupled dual rail dynamic logic circuitIBM·Filed 2000·Granted Dec 11, 2001·14 cites·14 claims
- 2467US12431432B2Method and apparatus for supplying power to VLSI silicon chipsIBM·Filed 2021·Granted Sep 30, 2025·0 cites·19 claims
- 2566US9851730B2Voltage droop controlQUALCOMM INC·Filed 2015·Granted Dec 26, 2017·1 cites·29 claims
- 2665US6232799B1Method and apparatus for selectively controlling weak feedback in regenerative pass gate logic circuitsIBM·Filed 1999·Granted May 15, 2001·18 cites·12 claims
- 2765US4926370AMethod and apparatus for processing postnormalization and rounding in parallelIBM·Filed 1989·Granted May 15, 1990·34 cites·5 claims
- 2861US7503025B2Method to generate circuit energy models for macros containing internal clock gatingIBM·Filed 2005·Granted Mar 10, 2009·2 cites·9 claims
- 2958US6879928B2Method and apparatus to dynamically recalibrate VLSI chip thermal sensors through software controlIBM·Filed 2003·Granted Apr 12, 2005·8 cites·20 claims
- 3057US7941680B2Distributing integrated circuit net power accurately in power and thermal analysisIBM·Filed 2007·Granted May 10, 2011·1 cites·18 claims
- 3157US7509606B2Method for optimizing power in a very large scale integration (VLSI) design by detecting clock gating opportunitiesIBM·Filed 2006·Granted Mar 24, 2009·1 cites·2 claims
- 3256US7725744B2Method and apparatus to generate circuit energy models with multiple clock gating inputsIBM·Filed 2008·Granted May 25, 2010·1 cites·8 claims
- 3356US7656237B2Method to gate off PLLS in a deep power saving state without separate clock distribution for power management logicIBM·Filed 2004·Granted Feb 2, 2010·4 cites·19 claims
- 3455US11152378B1Reducing error rates with alpha particle protectionIBM·Filed 2020·Granted Oct 19, 2021·0 cites·20 claims
- 3554US6201431B1Method and apparatus for automatically adjusting noise immunity of an integrated circuitIBM·Filed 1999·Granted Mar 13, 2001·30 cites·11 claims
- 3653US10133285B2Voltage droop controlQUALCOMM INC·Filed 2017·Granted Nov 20, 2018·0 cites·19 claims
- 3750US8370780B2Method and system for estimating power consumption of integrated circuitryIBM·Filed 2010·Granted Feb 5, 2013·0 cites·17 claims
- 3850US7284138B2Deep power saving by disabling clock distribution without separate clock distribution for power management logicIBM·Filed 2004·Granted Oct 16, 2007·1 cites·6 claims
- 3948US10615248B1On-die capacitor for a VLSI chip with backside metal platesIBM·Filed 2018·Granted Apr 7, 2020·0 cites·20 claims
- 4045US8438569B2Broadcasting a condition to threads executing on a plurality of on-chip processorsDAY MICHAEL NORMAN·Filed 2004·Granted May 7, 2013·0 cites·12 claims
- 4144US2005159907A1Method and apparatus for VLSI clock gated power estimation using LCB countsIBM·Filed 2004·Application pending·0 cites
- 4244US2005278664A1Predicting power consumption for a chipIBM·Filed 2004·Application pending·0 cites
- 4343US2014249782A1Dynamic power prediction with pin attribute data modelIBM·Filed 2013·Application pending·0 cites
- 4442US2003110431A1Scanning an allowed value into a group of latchesIBM·Filed 2001·Application pending·0 cites
- 4542US2003191619A1Method and apparatus for implementing noise immunity and minimizing delay of CMOS logic circuitsIBM·Filed 2002·Application pending·0 cites
- 4640US2005261866A1Thermal protection for a VLSI chip through reduced c4 usageSONY COMPUTER ENTERTAINMENT INC·Filed 2004·Application pending·0 cites
- 4740US2004190585A1Method to calibrate a temperature sensitive ring oscillator with minimal test timeIBM·Filed 2003·Application pending·0 cites
- 4839US11101211B2Semiconductor device with backside inductor using through silicon viasIBM·Filed 2019·Granted Aug 24, 2021·0 cites·19 claims
- 4934US6407584B1Charge booster for CMOS dynamic circuitsIBM·Filed 2000·Granted Jun 18, 2002·0 cites·21 claims
- 5032US6337584B1Method and apparatus for reducing bipolar current effects in silicon-on-insulator (SOI) dynamic logic circuitsIBM·Filed 1999·Granted Jan 8, 2002·2 cites·17 claims
Showing the top 50 of 51 patent records by PatentIndex Score.
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