Inventor

LEE YUN-HAN

TW147 patents

⚠️ This page may combine multiple inventors who share the name “LEE YUN-HAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE YUN-HAN

TAIWAN SEMICONDUCTOR MFG CO LTD

Tri-layer CoWoS structure

Machine-learning design enablement platform

Tri-layer COWOS structure

Tri-layer CoWoS structure

Cell layout of semiconductor device

Memory circuit and cache circuit configuration

System and method for designing cell rows

System and method for designing cell rows

Memory macro including through-silicon via

Integrated circuit design method, system and computer program product

Method and system for reducing migration errors

Memory circuit and cache circuit configuration

Integrated circuit with radio frequency interconnect

Cell layout of semiconductor device

Memory macro including through-silicon via

Integrated circuit design method, system and computer program product

Method and system for reducing migration errors

Machine-learning design enablement platform

Cell layout of semiconductor device

System and method for ESL modeling of machine learning

Integrated circuit with radio frequency interconnect

Bidirectional scan chain structure and method

Transceiver group and associated router

Integrated antenna on interposer substrate

Integrated circuit system with distributed power supply comprising interposer and voltage regulator

Phase-locked loop monitor circuit

Function safety and fault management modeling at electrical system level (ESL)

Phase-locked loop monitor circuit

Scan architecture for interconnect testing in 3D integrated circuits

Phase-locked loop monitor circuit

FACEBOOK TECH LLC

Optical assemblies having scanning reflectors for projecting augmented reality content

Optical device having reduced diffraction artifacts for eye-tracking

Eye tracking based on telecentric polarization sensitive grating

Photochromic optical element

Light guide display assembly for providing expanded field of view

META PLATFORMS TECH LLC

Light guide display assembly for providing increased pupil replication density

Thin liquid crystal stack for polarization conversion

System and method for fabricating polarization holograms

CHI SHYH-AN

Integrated circuit system with distributed power supply comprising interposer and voltage regulator module

Substrate bias control circuit for system on chip

Retention flip-flop

LEE YUN-HAN

System and method for designing cell rows with differing cell heights

Networking packages based on interposers

MACLACHLAN IAN

Silencing of CSN5 gene expression using interfering RNA

UNIV CENTRAL FLORIDA RES FOUND INC

Optical display system with enhanced resolution, methods, and applications

TSENG NAN-HSIN

Methods for detecting defect connections between metal bumps

CHUANG YI-LIN

Group bounding box region-constrained placement for integrated circuit design

BAVISKAR DINESH

Reducing voltage drops in power networks using unused spaces in integrated circuits

WANG MILL-JER

Test probing structure

GOEL SANDEEP KUMAR

Interposers of 3-dimensional integrated circuit package systems and methods of designing the same