Inventor · disambiguated record
Udo Krautz
Also filed as: KRAUTZ UDO
12 granted patents·1 pending application·38 citations·filing 2007–2017
87Inventor score
Technology areasG06F
Top patents by PatentIndex Score
13 records- 0187US9483591B1Assuring chip reliability with automatic generation of drivers and assertionsIBM·Filed 2015·Granted Nov 1, 2016·6 cites·20 claims
- 0283US9471327B2Verifying forwarding paths in pipelinesIBM·Filed 2013·Granted Oct 18, 2016·7 cites·7 claims
- 0381US9459878B2Verifying forwarding paths in pipelinesIBM·Filed 2014·Granted Oct 4, 2016·6 cites·4 claims
- 0476US8918747B2Formal verification of a logic designIBM·Filed 2013·Granted Dec 23, 2014·5 cites·6 claims
- 0575US7890903B2Method and system for formal verification of an electronic circuit designIBM·Filed 2008·Granted Feb 15, 2011·8 cites·10 claims
- 0674US10303438B2Fused-multiply-add floating-point operations on 128 bit wide operandsIBM·Filed 2017·Granted May 28, 2019·2 cites·23 claims
- 0774US9274791B2Verification of a vector execution unit designIBM·Filed 2013·Granted Mar 1, 2016·3 cites·5 claims
- 0869US9600616B1Assuring chip reliability with automatic generation of drivers and assertionsIBM·Filed 2016·Granted Mar 21, 2017·1 cites·20 claims
- 0952US9569573B1RAS evaluation for circuit elementIBM·Filed 2016·Granted Feb 14, 2017·0 cites·6 claims
- 1051US9703907B2RAS evaluation for circuit elementIBM·Filed 2015·Granted Jul 11, 2017·0 cites·12 claims
- 1151US9268563B2Verification of a vector execution unit designIBM·Filed 2012·Granted Feb 23, 2016·0 cites·10 claims
- 1247US7949968B2Method and system for building binary decision diagrams optimally for nodes in a netlist graph using don't-caringIBM·Filed 2007·Granted May 24, 2011·0 cites·14 claims
- 1341US2012330637A1Method for providing debugging tool for a hardware design and debugging tool for a hardware designKRAUTZ UDO·Filed 2012·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →