Inventor · disambiguated record
Mark L. Neidengard
Also filed as: NEIDENGARD MARK · NEIDENGARD MARK L
18 granted patents·4 pending applications·76 citations·filing 2004–2023
92Inventor score
Top patents by PatentIndex Score
22 records- 0189US10790838B1Method and apparatus to perform dynamic frequency scaling while a phase-locked loop operates in a closed loopINTEL CORP·Filed 2019·Granted Sep 29, 2020·9 cites·20 claims
- 0286US7049865B2Power-on detect circuit for use with multiple voltage domainsINTEL CORP·Filed 2004·Granted May 23, 2006·32 cites·33 claims
- 0380US8756451B2Frequency synthesis methods and systemsNEIDENGARD MARK L·Filed 2011·Granted Jun 17, 2014·7 cites·17 claims
- 0479US9450589B2Clock generation system with dynamic distribution bypass modeINTEL CORP·Filed 2013·Granted Sep 20, 2016·4 cites·22 claims
- 0575US9698764B2Quadrature dividerNEIDENGARD MARK L·Filed 2013·Granted Jul 4, 2017·4 cites·12 claims
- 0667US7679404B2Missing clock pulse detectorINTEL CORP·Filed 2006·Granted Mar 16, 2010·5 cites·8 claims
- 0767US7667507B2Edge-timing adjustment circuitINTEL CORP·Filed 2008·Granted Feb 23, 2010·5 cites·9 claims
- 0866US9190991B2Apparatus, system, and method for re-synthesizing a clock signalNEIDENGARD MARK·Filed 2011·Granted Nov 17, 2015·3 cites·20 claims
- 0963US10439617B2Bidirectional gray code counterINTEL CORP·Filed 2016·Granted Oct 8, 2019·1 cites·25 claims
- 1061US11461504B2Apparatus for autonomous security and functional safety of clock and voltages including adjustment of a divider ratioINTEL CORP·Filed 2020·Granted Oct 4, 2022·0 cites·21 claims
- 1160US11211934B2Apparatus to improve lock time of a frequency locked loopINTEL CORP·Filed 2020·Granted Dec 28, 2021·0 cites·16 claims
- 1260US9876491B2Apparatus, system, and method for re-synthesizing a clock signalINTEL CORP·Filed 2015·Granted Jan 23, 2018·1 cites·20 claims
- 1360US9438219B2Hybrid digital pulse width modulation (PWM) based on phases of a system clockKRISHNAMURTHY HARISH K·Filed 2011·Granted Sep 6, 2016·2 cites·16 claims
- 1455US10824764B2Apparatus for autonomous security and functional safety of clock and voltagesINTEL CORP·Filed 2018·Granted Nov 3, 2020·0 cites·20 claims
- 1554US9836078B2Clock generation system with dynamic distribution bypass modeINTEL CORP·Filed 2016·Granted Dec 5, 2017·0 cites·20 claims
- 1654US7405631B2Oscillating divider topologyINTEL CORP·Filed 2004·Granted Jul 29, 2008·3 cites·17 claims
- 1751US10790832B2Apparatus to improve lock time of a frequency locked loopINTEL CORP·Filed 2018·Granted Sep 29, 2020·0 cites·26 claims
- 1851US2025211212A1Duty cycle regulatorINTEL CORP·Filed 2023·Application pending·0 cites
- 1947US10320395B2Cascaded counter circuit with pipelined reload of variable ratio determined valuesINTEL CORP·Filed 2017·Granted Jun 11, 2019·0 cites·20 claims
- 2043US2025211238A1Die-to-die clock signalling including adaptive frequency delay-locked loopINTEL CORP·Filed 2023·Application pending·0 cites
- 2141US2008258782A1Oscillating divider topologyNEIDENGARD MARK L·Filed 2008·Application pending·0 cites
- 2229US2007075753A1Duty cycle measurement circuitPARKER RACHAEL·Filed 2005·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →