Inventor · disambiguated record
Barbara Alana Chappell
Also filed as: CHAPPELL BARBARA A · CHAPPELL BARBARA ALANA
4 granted patents·108 citations·filing 1988–1997
78Inventor score
Files withIBM4
Top patents by PatentIndex Score
4 records- 0172US6131182AMethod and apparatus for synthesizing and optimizing control logic based on SRCMOS logic array macrosIBM·Filed 1997·Granted Oct 10, 2000·72 cites·31 claims
- 0260US4845669ATransporsable memory architectureIBM·Filed 1988·Granted Jul 4, 1989·19 cites·7 claims
- 0348US6005416ACompiled self-resetting CMOS logic array macrosIBM·Filed 1997·Granted Dec 21, 1999·10 cites·38 claims
- 0434US5633820ASelf-resetting CMOS parallel adder with a bubble pipelined architecture, tri-rail merging logic, and enhanced testabilityIBM·Filed 1995·Granted May 27, 1997·7 cites·12 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →