Inventor · disambiguated record
Sophie Wilson
Also filed as: WILSON SOPHIE · WILSON SOPHIE M · WILSON SOPHIE MARY
39 granted patents·2 pending applications·391 citations·filing 1999–2014
98Inventor score
Top patents by PatentIndex Score
41 records- 0189US7707393B2Microprocessor with high speed memory integrated in load/store unit to efficiently perform scatter and gather operationsBROADCOM CORP·Filed 2007·Granted Apr 27, 2010·17 cites·7 claims
- 0288US7287152B2Conditional execution per laneBROADCOM CORP·Filed 2006·Granted Oct 23, 2007·16 cites·24 claims
- 0379US7216218B2Microprocessor with high speed memory integrated in load/store unit to efficiently perform scatter and gather operationsBROADCOM CORP·Filed 2004·Granted May 8, 2007·23 cites·12 claims
- 0478US7861071B2Conditional branch instruction capable of testing a plurality of indicators in a predicate registerBROADCOM CORP·Filed 2002·Granted Dec 28, 2010·25 cites·17 claims
- 0576US6918031B2Setting condition values in a computerBROADCOM CORP·Filed 2002·Granted Jul 12, 2005·17 cites·15 claims
- 0676US6530012B1Setting condition values in a computerBROADCOM CORP·Filed 1999·Granted Mar 4, 2003·56 cites·12 claims
- 0775US6986025B2Conditional execution per laneBROADCOM CORP·Filed 2002·Granted Jan 10, 2006·18 cites·25 claims
- 0875US6662292B1Memory access systemBROADCOM CORP·Filed 1999·Granted Dec 9, 2003·54 cites·19 claims
- 0974US9841974B2Renaming with generation numbersAVAGO TECHNOLOGIES GENERAL IP·Filed 2014·Granted Dec 12, 2017·3 cites·23 claims
- 1073US7127593B2Conditional execution with multiple destination storesBROADCOM CORP·Filed 2002·Granted Oct 24, 2006·16 cites·19 claims
- 1172US7987347B2System and method for implementing a zero overhead loopBROADCOM CORP·Filed 2006·Granted Jul 26, 2011·6 cites·4 claims
- 1272US7441098B2Conditional execution of instructions in a computerBROADCOM CORP·Filed 2005·Granted Oct 21, 2008·4 cites·20 claims
- 1372US7017032B2Setting execution conditionsBROADCOM CORP·Filed 2002·Granted Mar 21, 2006·17 cites·24 claims
- 1472US6720894B2Method of and system for performing differential lossless compressionBROADCOM CORP·Filed 2002·Granted Apr 13, 2004·16 cites·26 claims
- 1569US7375662B2Method of and system for performing differential lossless compressionBROADCOM CORP·Filed 2003·Granted May 20, 2008·13 cites·20 claims
- 1667US9710272B2Computer processor with generation renamingAVAGO TECHNOLOGIES GENERAL IP·Filed 2014·Granted Jul 18, 2017·2 cites·20 claims
- 1767US6918029B2Method and system for executing conditional instructions using a test register address that points to a test register from which a test code is selectedBROADCOM CORP·Filed 2003·Granted Jul 12, 2005·9 cites·13 claims
- 1866US7627734B2Virtual on-chip memoryBROADCOM CORP·Filed 2007·Granted Dec 1, 2009·3 cites·23 claims
- 1965US10209992B2System and method for branch prediction using two branch history tables and presetting a global branch history registerAVAGO TECH INT SALES PTE LID·Filed 2014·Granted Feb 19, 2019·2 cites·21 claims
- 2063US8046568B2Microprocessor with integrated high speed memoryBROADCOM CORP·Filed 2010·Granted Oct 25, 2011·1 cites·18 claims
- 2162US7346763B2Processor instruction with repeated execution codeBROADCOM CORP·Filed 2004·Granted Mar 18, 2008·8 cites·9 claims
- 2258US7600102B2Condition bits for controlling branch processingBROADCOM CORP·Filed 2004·Granted Oct 6, 2009·5 cites·21 claims
- 2357US10713049B2Stunt box to broadcast and store results until retirement for an out-of-order processorAVAGO TECH INT SALES PTE LID·Filed 2014·Granted Jul 14, 2020·0 cites·16 claims
- 2456US7236106B2Methods and systems for data manipulationBROADCOM CORP·Filed 2004·Granted Jun 26, 2007·3 cites·35 claims
- 2555US6836837B2Register addressingBROADCOM CORP·Filed 2003·Granted Dec 28, 2004·3 cites·9 claims
- 2654US8521997B2Conditional execution with multiple destination storesWILSON SOPHIE·Filed 2006·Granted Aug 27, 2013·1 cites·15 claims
- 2754US6816959B2Memory access systemBROADCOM CORP·Filed 2003·Granted Nov 9, 2004·2 cites·16 claims
- 2850US7979679B2System and method for selectively controlling operations in lanes in an execution unit of a computerBROADCOM CORP·Filed 2006·Granted Jul 12, 2011·0 cites·10 claims
- 2950US7234042B1Identification bit at a predetermined instruction location that indicates whether the instruction is one or two independent operations and indicates the nature the operations executing in two processing channelsBROADCOM CORP·Filed 1999·Granted Jun 19, 2007·22 cites·11 claims
- 3050US6601157B1Register addressingBROADCOM CORP·Filed 2000·Granted Jul 29, 2003·1 cites·9 claims
- 3149US7143265B2Computer program product memory access systemBROADCOM CORP·Filed 2004·Granted Nov 28, 2006·0 cites·25 claims
- 3249US2005257032A1Accessing a test conditionBROADCOM CORP·Filed 2005·Application pending·0 cites
- 3348US7266671B2Register addressingBROADCOM CORP·Filed 2004·Granted Sep 4, 2007·0 cites·13 claims
- 3448US7002595B2Processing of color graphics dataBROADCOM CORP·Filed 2002·Granted Feb 21, 2006·2 cites·11 claims
- 3547US7747843B2Microprocessor with integrated high speed memoryBROADCOM CORP·Filed 2004·Granted Jun 29, 2010·0 cites·21 claims
- 3646US6975250B2Methods and systems for data manipulationBROADCOM CORP·Filed 2002·Granted Dec 13, 2005·0 cites·23 claims
- 3745US7191317B1System and method for selectively controlling operations in lanesBROADCOM CORP·Filed 1999·Granted Mar 13, 2007·15 cites·13 claims
- 3842US6530015B1Accessing a test condition for multiple sub-operations using a test registerBROADCOM CORP·Filed 1999·Granted Mar 4, 2003·10 cites·11 claims
- 3940US7620796B2System and method for acceleration of streams of dependent instructions within a microprocessorBROADCOM CORP·Filed 2007·Granted Nov 17, 2009·0 cites·17 claims
- 4039US7287212B2Methods and systems for Viterbi decodingBROADCOM CORP·Filed 2004·Granted Oct 23, 2007·1 cites·6 claims
- 4130US2005071734A1Methods and systems for Viterbi decodingBROADCOM CORP·Filed 2004·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →