Inventor · disambiguated record
David P. Chengson
Also filed as: CHENGSON DAVID · CHENGSON DAVID P · CHENGSON DAVID PAUL
29 granted patents·2 pending applications·627 citations·filing 1986–2019
97Inventor score
Files withJUNIPER NETWORKS INC14CHENGSON DAVID P6SILICON GRAPHICS INC6TANDEM COMPUTERS INC3CHENGSON DAVID1
Top patents by PatentIndex Score
31 records- 0195US8508248B1Testing vias formed in printed circuit boardsCHENGSON DAVID P·Filed 2011·Granted Aug 13, 2013·18 cites·20 claims
- 0294US10231325B1Placement of vias in printed circuit board circuitsJUNIPER NETWORKS INC·Filed 2016·Granted Mar 12, 2019·22 cites·9 claims
- 0394US5710733AProcessor-inclusive memory moduleSILICON GRAPHICS INC·Filed 1996·Granted Jan 20, 1998·189 cites·22 claims
- 0492US10365314B1Electrical signature fault detectionJUNIPER NETWORKS INC·Filed 2016·Granted Jul 30, 2019·6 cites·6 claims
- 0592US5790612ASystem and method to reduce jitter in digital delay-locked loopsSILICON GRAPHICS INC·Filed 1996·Granted Aug 4, 1998·125 cites·14 claims
- 0690US10455690B1Grid array pattern for crosstalk reductionJUNIPER NETWORKS INC·Filed 2018·Granted Oct 22, 2019·8 cites·20 claims
- 0789US6538518B1Multi-loop phase lock loop for controlling jitter in a high frequency redundant systemJUNIPER NETWORKS INC·Filed 2000·Granted Mar 25, 2003·45 cites·21 claims
- 0883US5811997AMulti-configurable push-pull/open-drain driver circuitSILICON GRAPHICS INC·Filed 1996·Granted Sep 22, 1998·47 cites·21 claims
- 0982US10383213B1Placement of vias in printed circuit board circuitsJUNIPER NETWORKS INC·Filed 2019·Granted Aug 13, 2019·3 cites·15 claims
- 1077US7061939B1Source synchronous link with clock recovery and bit skew alignmentJUNIPER NETWORS INC·Filed 2001·Granted Jun 13, 2006·27 cites·29 claims
- 1176US10069596B1Systems and methods for error detection and correctionJUNIPER NETWORKS INC·Filed 2016·Granted Sep 4, 2018·3 cites·26 claims
- 1275US8452908B2Low latency serial memory interfaceCHENGSON DAVID P·Filed 2009·Granted May 28, 2013·6 cites·25 claims
- 1371US10455691B1Grid array pattern for crosstalk reductionJUNIPER NETWORKS INC·Filed 2018·Granted Oct 22, 2019·1 cites·20 claims
- 1469US5999437AProcessor-inclusive memory moduleSILICON GRAPHICS INC·Filed 1997·Granted Dec 7, 1999·33 cites·8 claims
- 1566US9237003B1Digital bit insertion for clock recoveryCHENGSON DAVID P·Filed 2011·Granted Jan 12, 2016·2 cites·20 claims
- 1664US7924862B2Systems and methods for reducing reflections and frequency dependent dispersions in redundant linksJUNIPER NETWORKS INC·Filed 2010·Granted Apr 12, 2011·1 cites·20 claims
- 1764US6646982B1Redundant source synchronous bussesJUNIPER NETWORKS INC·Filed 2000·Granted Nov 11, 2003·9 cites·8 claims
- 1863US11156651B1Electrical signature fault detectionJUNIPER NETWORKS INC·Filed 2019·Granted Oct 26, 2021·0 cites·12 claims
- 1961US8411695B1Multi-interface compatible bus over a common physical connectionCHENGSON DAVID P·Filed 2005·Granted Apr 2, 2013·2 cites·21 claims
- 2059US7515614B1Source synchronous link with clock recovery and bit skew alignmentJUNIPER NETWORKS INC·Filed 2006·Granted Apr 7, 2009·1 cites·20 claims
- 2159US5793259AApparatus for generating differential noise between power and ground planesSILICON GRAPHICS INC·Filed 1997·Granted Aug 11, 1998·20 cites·38 claims
- 2257US5036528ASelf-calibrating clock synchronization systemTANDEM COMPUTERS INC·Filed 1990·Granted Jul 30, 1991·34 cites·13 claims
- 2354US8000351B2Source synchronous link with clock recovery and bit skew alignmentJUNIPER NETWORKS INC·Filed 2009·Granted Aug 16, 2011·0 cites·15 claims
- 2454US7724761B1Systems and methods for reducing reflections and frequency dependent dispersions in redundant linksJUNIPER NETWORKS INC·Filed 2003·Granted May 25, 2010·2 cites·29 claims
- 2548US2013215911A1Multi-interface compatible bus over a common physical connectionCHENGSON DAVID P·Filed 2013·Application pending·0 cites
- 2647US5041747ADelay regulation circuitTANDEM COMPUTERS INC·Filed 1986·Granted Aug 20, 1991·11 cites·15 claims
- 2743US8675483B2Systems and methods for reducing reflections and frequency dependent dispersions in redundant linksCHENGSON DAVID·Filed 2011·Granted Mar 18, 2014·0 cites·20 claims
- 2842US5867419AProcessor-inclusive memory moduleSILICON GRAPHICS INC·Filed 1997·Granted Feb 2, 1999·11 cites·9 claims
- 2935US8164392B2Error-free startup of low phase noise oscillatorsCHENGSON DAVID P·Filed 2010·Granted Apr 24, 2012·0 cites·22 claims
- 3035US2011267073A1Validating high speed link performance margin for switch fabric with any-to-any connection across a midplaneJUNIPER NETWORKS INC·Filed 2010·Application pending·0 cites
- 3129US4728818AEmitter function logic with concurrent, complementary outputsTANDEM COMPUTERS INC·Filed 1986·Granted Mar 1, 1988·1 cites·4 claims
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