Inventor · disambiguated record
Jeffrey H. Seltzer
Also filed as: SELTZER JEFFREY · SELTZER JEFFREY H
16 granted patents·1 pending application·659 citations·filing 1986–2018
95Inventor score
Top patents by PatentIndex Score
17 records- 0198US5357153AMacrocell with product-term cascade and improved flip flop utilizationXILINX INC·Filed 1993·Granted Oct 18, 1994·205 cites·11 claims
- 0289US10819680B1Interface firewall for an integrated circuit of an expansion cardXILINX INC·Filed 2018·Granted Oct 27, 2020·9 cites·20 claims
- 0387US6466049B1Clock enable control circuit for flip flopsXILINX INC·Filed 2000·Granted Oct 15, 2002·35 cites·13 claims
- 0487US5563529AHigh speed product term allocation structure supporting logic iteration after committing device pin locationsXILINX INC·Filed 1995·Granted Oct 8, 1996·58 cites·30 claims
- 0586US7970977B1Deadlock-resistant bus bridge with pipeline-restricted address rangesXILINX INC·Filed 2009·Granted Jun 28, 2011·17 cites·18 claims
- 0685US5821774AStructure and method for arithmetic function implementation in an EPLD having high speed product term allocation structureXILINX INC·Filed 1996·Granted Oct 13, 1998·61 cites·32 claims
- 0782US4833651AHigh-speed, asynchronous, No-Fall-Through, first-in-first out memory with high data integrityNAT SEMICONDUCTOR CORP·Filed 1986·Granted May 23, 1989·76 cites·13 claims
- 0881US5764076ACircuit for partially reprogramming an operational programmable logic deviceXILINX INC·Filed 1996·Granted Jun 9, 1998·40 cites·9 claims
- 0980US5991523AMethod and system for HDL global signal simulation and verificationXILINX INC·Filed 1997·Granted Nov 23, 1999·59 cites·20 claims
- 1079US6172518B1Method of minimizing power use in programmable logic devicesXILINX INC·Filed 1999·Granted Jan 9, 2001·33 cites·13 claims
- 1179US5302866AInput circuit block and method for PLDs with register clock enable selectionXILINX INC·Filed 1993·Granted Apr 12, 1994·33 cites·20 claims
- 1266US5565792AMacrocell with product-term cascade and improved flip flop utilizationXILINX INC·Filed 1994·Granted Oct 15, 1996·14 cites·7 claims
- 1360US8769449B1System level circuit designXILINX INC·Filed 2013·Granted Jul 1, 2014·1 cites·15 claims
- 1458US2014201097A1Method and System for Comparing and Advising Individuals and GroupsSELTZER JEFFREY·Filed 2014·Application pending·0 cites
- 1557US5969539AProduct term exporting mechanism and method improvement in an EPLD having high speed product term allocation structureXILINX INC·Filed 1997·Granted Oct 19, 1999·16 cites·19 claims
- 1647US10970446B1Automated pipeline insertion on a busXILINX INC·Filed 2018·Granted Apr 6, 2021·0 cites·11 claims
- 1741US6980030B1Embedded function units with decodingXILINX INC·Filed 2003·Granted Dec 27, 2005·2 cites·46 claims
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