Inventor · disambiguated record
Efraim Aloni
Also filed as: ALONI EFRAIM
10 granted patents·216 citations·filing 1999–2008
90Inventor score
Files withTOWER SEMICONDUCTOR LTD10
Top patents by PatentIndex Score
10 records- 0188US6346442B1Methods for fabricating a semiconductor chip having CMOS devices and a fieldless arrayTOWER SEMICONDUCTOR LTD·Filed 1999·Granted Feb 12, 2002·125 cites·17 claims
- 0280US6703298B2Self-aligned process for fabricating memory cells with two isolated floating gatesTOWER SEMICONDUCTOR LTD·Filed 2002·Granted Mar 9, 2004·33 cites·12 claims
- 0374US7700994B2Single poly CMOS logic memory cell for RFID application and its programming and erasing methodTOWER SEMICONDUCTOR LTD·Filed 2007·Granted Apr 20, 2010·12 cites·13 claims
- 0466US7754559B2Method for fabricating capacitor structures using the first contact metalTOWER SEMICONDUCTOR LTD·Filed 2008·Granted Jul 13, 2010·4 cites·21 claims
- 0566US6458702B1Methods for making semiconductor chip having both self aligned silicide regions and non-self aligned silicide regionsTOWER SEMICONDUCTOR LTD·Filed 2000·Granted Oct 1, 2002·14 cites·10 claims
- 0665US7439575B2Protection against in-process charging in silicon-oxide-nitride-oxide-silicon (SONOS) memoriesTOWER SEMICONDUCTOR LTD·Filed 2005·Granted Oct 21, 2008·3 cites·8 claims
- 0760US6583066B2Methods for fabricating a semiconductor chip having CMOS devices and fieldless arrayTOWER SEMICONDUCTOR LTD·Filed 2001·Granted Jun 24, 2003·9 cites·5 claims
- 0856US7060627B2Method of decreasing charging effects in oxide-nitride-oxide (ONO) memory arraysTOWER SEMICONDUCTOR LTD·Filed 2003·Granted Jun 13, 2006·7 cites·15 claims
- 0952US6686276B2Semiconductor chip having both polycide and salicide gates and methods for making sameTOWER SEMICONDUCTOR LTD·Filed 2002·Granted Feb 3, 2004·6 cites·7 claims
- 1048US6959920B2Protection against in-process charging in silicon-oxide-nitride-oxide-silicon (SONOS) memoriesTOWER SEMICONDUCTOR LTD·Filed 2003·Granted Nov 1, 2005·3 cites·16 claims
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