Inventor · disambiguated record
Nobuyuki Yamanishi
Also filed as: YAMANISHI NOBUYUKI
8 granted patents·1 pending application·57 citations·filing 1999–2012
86Inventor score
Top patents by PatentIndex Score
9 records- 0184US7737555B2Semiconductor method having silicon-diffused metal wiring layerNEC ELECTRONICS CORP·Filed 2006·Granted Jun 15, 2010·6 cites·10 claims
- 0277US7842602B2Semiconductor device having silicon-diffused metal wiring layer and its manufacturing methodRENESAS ELECTRONICS CORP·Filed 2007·Granted Nov 30, 2010·3 cites·25 claims
- 0374US6307730B1Capacitor formed by lower electrode having inner and outer uneven surfacesNEC CORP·Filed 2000·Granted Oct 23, 2001·22 cites·5 claims
- 0467US8642467B2Semiconductor device having silicon-diffused metal wiring layer and its manufacturing methodOHTO KOICHI·Filed 2012·Granted Feb 4, 2014·1 cites·28 claims
- 0567US7687917B2Single damascene structure semiconductor device having silicon-diffused metal wiring layerNEC ELECTRONICS CORP·Filed 2003·Granted Mar 30, 2010·7 cites·13 claims
- 0666US8115318B2Semiconductor device having silicon-diffused metal wiring layer and its manufacturing methodOHTO KOICHI·Filed 2010·Granted Feb 14, 2012·1 cites·17 claims
- 0752US6399439B1Method for manufacturing semiconductor deviceNEC CORP·Filed 1999·Granted Jun 4, 2002·14 cites·6 claims
- 0850US6436761B1Method for manufacturing semiconductor memory devicesNEC CORP·Filed 2000·Granted Aug 20, 2002·3 cites·9 claims
- 0937US2003209738A1Semiconductor device having silicon-including metal wiring layer and its manufacturing methodNEC CORP·Filed 2002·Application pending·0 cites
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