Inventor · disambiguated record
Johannes Wang
Also filed as: LENTZ DEREK J · WANG JOHANNES
70 granted patents·3 pending applications·2,786 citations·filing 1992–2009
99Inventor score
Top patents by PatentIndex Score
73 records- 0195US7739482B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2006·Granted Jun 15, 2010·26 cites·18 claims
- 0295US5560032AHigh-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 1995·Granted Sep 24, 1996·193 cites·29 claims
- 0395US5539911AHigh-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1992·Granted Jul 23, 1996·133 cites·56 claims
- 0495US5438668ASystem and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computerSEIKO EPSON CORP·Filed 1992·Granted Aug 1, 1995·159 cites·29 claims
- 0593US5497499ASuperscalar risc instruction schedulingSEIKO EPSON CORP·Filed 1994·Granted Mar 5, 1996·120 cites·16 claims
- 0692US6775761B2System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessorSEIKO EPSON CORP·Filed 2002·Granted Aug 10, 2004·51 cites·47 claims
- 0792US6647485B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2001·Granted Nov 11, 2003·42 cites·40 claims
- 0891US5689720AHigh-performance superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1996·Granted Nov 18, 1997·90 cites·11 claims
- 0990US7000097B2System and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 2002·Granted Feb 14, 2006·44 cites·12 claims
- 1090US6965987B2System and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 2003·Granted Nov 15, 2005·43 cites·58 claims
- 1190US5619666ASystem for translating non-native instructions to native instructions and combining them into a final bucket for processing on a host processorSEIKO EPSON CORP·Filed 1995·Granted Apr 8, 1997·110 cites·12 claims
- 1289US7844797B2System and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 2009·Granted Nov 30, 2010·13 cites·26 claims
- 1389US6986024B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2002·Granted Jan 10, 2006·28 cites·24 claims
- 1489US5557763ASystem for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 1995·Granted Sep 17, 1996·120 cites·24 claims
- 1588US6915412B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2002·Granted Jul 5, 2005·25 cites·26 claims
- 1687US6948052B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2002·Granted Sep 20, 2005·23 cites·39 claims
- 1787US5961629AHigh performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1998·Granted Oct 5, 1999·135 cites·27 claims
- 1887US5546552AMethod for translating non-native instructions to native instructions and combining them into a final bucket for processing on a host processorSEIKO EPSON CORP·Filed 1995·Granted Aug 13, 1996·82 cites·7 claims
- 1986US7721070B2High-performance, superscalar-based computer system with out-of-order instruction executionNGUYEN LE TRONG·Filed 2008·Granted May 18, 2010·10 cites·21 claims
- 2086US7162610B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2003·Granted Jan 9, 2007·21 cites·35 claims
- 2186US6412064B1System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessorSEIKO EPSON CORP·Filed 2000·Granted Jun 25, 2002·28 cites·41 claims
- 2285US7051187B2Superscalar RISC instruction schedulingTRANSMETA CORP·Filed 2002·Granted May 23, 2006·24 cites·19 claims
- 2385US6959375B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2002·Granted Oct 25, 2005·19 cites·10 claims
- 2484US6934829B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2003·Granted Aug 23, 2005·17 cites·21 claims
- 2584US5659782ASystem and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 1994·Granted Aug 19, 1997·73 cites·38 claims
- 2682US7447876B2System and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 2005·Granted Nov 4, 2008·7 cites·88 claims
- 2782US5448705ARISC microprocessor architecture implementing fast trap and exception stateSEIKO EPSON CORP·Filed 1993·Granted Sep 5, 1995·79 cites·3 claims
- 2881US7664935B2System and method for translating non-native instructions to native instructions for processing on a host processorCOON BRETT·Filed 2008·Granted Feb 16, 2010·6 cites·18 claims
- 2981US7523296B2System and method for handling exceptions and branch mispredictions in a superscalar microprocessorSEIKO EPSON CORP·Filed 2005·Granted Apr 21, 2009·6 cites·24 claims
- 3081US6230254B1System and method for handling load and/or store operators in a superscalar microprocessorSEIKO EPSON CORP·Filed 1999·Granted May 8, 2001·59 cites·9 claims
- 3180US7555632B2High-performance superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 2005·Granted Jun 30, 2009·6 cites·23 claims
- 3280US6941447B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2003·Granted Sep 6, 2005·13 cites·23 claims
- 3380US6128723AHigh-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Oct 3, 2000·42 cites·27 claims
- 3479US7941635B2High-performance superscalar-based computer system with out-of order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 2006·Granted May 10, 2011·5 cites·5 claims
- 3579US7028161B2High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 2001·Granted Apr 11, 2006·17 cites·39 claims
- 3679US6957320B2System and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 2002·Granted Oct 18, 2005·16 cites·16 claims
- 3779US6038654AHigh performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Mar 14, 2000·39 cites·80 claims
- 3879US5481685ARISC microprocessor architecture implementing fast trap and exception stateSEIKO EPSON CORP·Filed 1994·Granted Jan 2, 1996·66 cites·16 claims
- 3978US8019975B2System and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 2005·Granted Sep 13, 2011·5 cites·59 claims
- 4078US6954847B2System and method for translating non-native instructions to native instructions for processing on a host processorTRANSMETA CORP·Filed 2002·Granted Oct 11, 2005·14 cites·7 claims
- 4178US5737624ASuperscalar risc instruction schedulingSEIKO EPSON CORP·Filed 1996·Granted Apr 7, 1998·51 cites·19 claims
- 4277US7343473B2System and method for translating non-native instructions to native instructions for processing on a host processorTRANSMETA CORP·Filed 2005·Granted Mar 11, 2008·4 cites·18 claims
- 4377US6092181AHigh-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1997·Granted Jul 18, 2000·37 cites·62 claims
- 4477US5826055ASystem and method for retiring instructions in a superscalar microprocessorSEIKO EPSON CORP·Filed 1995·Granted Oct 20, 1998·82 cites·52 claims
- 4576US6920548B2System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessorSEIKO EPSON CORP·Filed 2004·Granted Jul 19, 2005·12 cites·58 claims
- 4676US6272619B1High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Aug 7, 2001·34 cites·80 claims
- 4776US6256720B1High performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Jul 3, 2001·34 cites·80 claims
- 4876US5394515APage printer controller including a single chip superscalar microprocessor with graphics functional unitsSEIKO EPSON CORP·Filed 1994·Granted Feb 28, 1995·57 cites·12 claims
- 4975US6101594AHigh-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Aug 8, 2000·31 cites·31 claims
- 5074US6282630B1High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 1999·Granted Aug 28, 2001·41 cites·44 claims
Showing the top 50 of 73 patent records by PatentIndex Score.
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