Inventor · disambiguated record
Gerolf F. Hoflehner
Also filed as: HOFLEHNER GEROLF · HOFLEHNER GEROLF F
15 granted patents·6 pending applications·164 citations·filing 2000–2024
93Inventor score
Top patents by PatentIndex Score
21 records- 0190US8719806B2Speculative multi-threading for instruction prefetch and/or trace pre-buildWANG HONG·Filed 2010·Granted May 6, 2014·12 cites·14 claims
- 0287US8612949B2Methods and apparatuses for compiler-creating helper threads for multi-threadingLIAO SHIH-WEI·Filed 2009·Granted Dec 17, 2013·18 cites·12 claims
- 0380US7398521B2Methods and apparatuses for thread management of multi-threadingINTEL CORP·Filed 2004·Granted Jul 8, 2008·26 cites·14 claims
- 0478US9223553B2Methods and apparatus to validate translated guest code in a dynamic binary translatorINTEL CORP·Filed 2013·Granted Dec 29, 2015·5 cites·17 claims
- 0576US9858057B2Methods and apparatus to validate translated guest code in a dynamic binary translatorINTEL CORP·Filed 2015·Granted Jan 2, 2018·2 cites·20 claims
- 0673US7814469B2Speculative multi-threading for instruction prefetch and/or trace pre-buildINTEL CORP·Filed 2003·Granted Oct 12, 2010·13 cites·20 claims
- 0773US7647482B2Methods and apparatus for dynamic register scratchingINTEL CORP·Filed 2006·Granted Jan 12, 2010·6 cites·15 claims
- 0872US7328433B2Methods and apparatus for reducing memory latency in a software applicationINTEL CORP·Filed 2003·Granted Feb 5, 2008·19 cites·34 claims
- 0969US6907601B1Method and apparatus for inserting more than one allocation instruction within a routineINTEL CORP·Filed 2000·Granted Jun 14, 2005·15 cites·80 claims
- 1067US7228528B2Building inter-block streams from a dynamic execution trace for a programINTEL CORP·Filed 2003·Granted Jun 5, 2007·13 cites·25 claims
- 1164US8095920B2Post-pass binary adaptation for software-based speculative precomputationLIAO STEVE SHIH-WEI·Filed 2002·Granted Jan 10, 2012·11 cites·47 claims
- 1264US2025124356A1Machine learning model compilerAPPLE INC·Filed 2024·Application pending·0 cites
- 1362US7603546B2System, method and apparatus for dependency chain processingINTEL CORP·Filed 2004·Granted Oct 13, 2009·10 cites·22 claims
- 1459US7617495B2Resource-aware scheduling for compilersINTEL CORP·Filed 2004·Granted Nov 10, 2009·7 cites·24 claims
- 1557US7260705B2Apparatus to implement mesocodeINTEL CORP·Filed 2003·Granted Aug 21, 2007·7 cites·30 claims
- 1654US12182669B2Machine learning model compilerAPPLE INC·Filed 2020·Granted Dec 31, 2024·0 cites·20 claims
- 1745US2005071438A1Methods and apparatuses for compiler-creating helper threads for multi-threadingFiled 2003·Application pending·0 cites
- 1845US2005071841A1Methods and apparatuses for thread management of mult-threadingFiled 2003·Application pending·0 cites
- 1945US2004154010A1Control-quasi-independent-points guided speculative multithreadingFiled 2003·Application pending·0 cites
- 2042US2004237076A1Code out-liningFiled 2003·Application pending·0 cites
- 2140US2002199179A1Method and apparatus for compiler-generated triggering of auxiliary codesFiled 2001·Application pending·0 cites
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