Inventor · disambiguated record
Tingdong Zhou
Also filed as: ZHOU TINGDONG
28 granted patents·7 pending applications·99 citations·filing 2007–2024
95Inventor score
Top patents by PatentIndex Score
35 records- 0194US9726691B23D chip testing through micro-C4 interfaceIBM·Filed 2014·Granted Aug 8, 2017·24 cites·7 claims
- 0291US7863106B2Silicon interposer testing for three dimensional chip stackIBM·Filed 2008·Granted Jan 4, 2011·18 cites·22 claims
- 0390US9974174B1Package to board interconnect structure with built-in reference plane structureFREESCALE SEMICONDUCTOR INC·Filed 2016·Granted May 15, 2018·8 cites·19 claims
- 0486US9141421B2Reducing power grid noise in a processor while minimizing performance lossIBM·Filed 2012·Granted Sep 22, 2015·8 cites·11 claims
- 0586US8261226B1Network flow based module bottom surface metal pin assignmentBECKER WIREN DALE·Filed 2011·Granted Sep 4, 2012·13 cites·25 claims
- 0681US7533360B1Flow based package pin assignmentIBM·Filed 2008·Granted May 12, 2009·11 cites·1 claims
- 0778US9600619B2Distribution of power vias in a multi-layer circuit boardIBM·Filed 2015·Granted Mar 21, 2017·2 cites·7 claims
- 0878US9543241B2Interconnect array pattern with a 3:1 signal-to-ground ratioIBM·Filed 2014·Granted Jan 10, 2017·3 cites·14 claims
- 0978US9456498B2Electronic module power supplyIBM·Filed 2013·Granted Sep 27, 2016·2 cites·14 claims
- 1077US9646925B2Interconnect array pattern with a 3:1 signal-to-ground ratioIBM·Filed 2015·Granted May 9, 2017·2 cites·9 claims
- 1176US12341089B2Device package substrate structure and method thereforNXP USA INC·Filed 2023·Granted Jun 24, 2025·0 cites·18 claims
- 1272US8572840B2Method of attaching an electronic module power supplyCHRISTO MICHAEL A·Filed 2010·Granted Nov 5, 2013·2 cites·3 claims
- 1369US9972566B2Interconnect array pattern with a 3:1 signal-to-ground ratioIBM·Filed 2016·Granted May 15, 2018·1 cites·19 claims
- 1468US10371717B23D chip testing through micro-C4 interfaceIBM·Filed 2017·Granted Aug 6, 2019·1 cites·6 claims
- 1565US10765002B2Electronic module power supplyIBM·Filed 2019·Granted Sep 1, 2020·0 cites·20 claims
- 1665US10537019B1Substrate dielectric crack prevention using interleaved metal planeNXP USA INC·Filed 2019·Granted Jan 14, 2020·1 cites·16 claims
- 1764US11798871B2Device package substrate structure and method thereforNXP USA INC·Filed 2020·Granted Oct 24, 2023·0 cites·19 claims
- 1863US10362674B2Electronic module power supplyIBM·Filed 2018·Granted Jul 23, 2019·0 cites·4 claims
- 1963US10037970B2Multiple interconnections between dieFREESCALE SEMICONDUCTOR INC·Filed 2016·Granted Jul 31, 2018·1 cites·20 claims
- 2063US8339803B2High-speed ceramic modules with hybrid referencing scheme for improved performance and reduced costBECKER WIREN DALE·Filed 2009·Granted Dec 25, 2012·2 cites·13 claims
- 2161US2024347928A1Antenna packageNXP BV·Filed 2024·Application pending·0 cites
- 2258US11193953B23D chip testing through micro-C4 interfaceIBM·Filed 2019·Granted Dec 7, 2021·0 cites·2 claims
- 2358US10080285B2Electronic module power supplyIBM·Filed 2016·Granted Sep 18, 2018·0 cites·11 claims
- 2457US2025038092A1Semiconductor device with hybrid routing and method thereforNXP USA INC·Filed 2023·Application pending·0 cites
- 2555US9146772B2Reducing power grid noise in a processor while minimizing performance lossIBM·Filed 2013·Granted Sep 29, 2015·0 cites·9 claims
- 2655US2024203911A1Interposer with integrative passive componentsNXP USA INC·Filed 2022·Application pending·0 cites
- 2753US9594865B2Distribution of power vias in a multi-layer circuit boardIBM·Filed 2015·Granted Mar 14, 2017·0 cites·13 claims
- 2853US2017006709A1Pad-to-pad embedded capacitance in lieu of signal via transitions in printed circuit boardsIBM·Filed 2015·Application pending·0 cites
- 2953US2016071822A1OPTIMIZING POWER DISTRIBUTION FROM A POWER SOURCE THROUGH A C4 SOLDER BALL GRID INTERCONNECTED THROUGH SILICON VIAS IN INTERMEDIATE INTEGRATED CIRCUIT CHIP CONNECTED TO CIRCUITRY IN AN UPPER INTEGRATED CIRCUIT CHIP THROUGH A GRID OF MICRO uC4 SOLDER BALLSIBM·Filed 2014·Application pending·0 cites
- 3052US2017004923A1Pad-to-pad embedded capacitance in lieu of signal via transitions in printed circuit boardsIBM·Filed 2015·Application pending·0 cites
- 3150US8683413B2Method for making high-speed ceramic modules with hybrid referencing scheme for improved performance and reduced costBECKER WIREN DALE·Filed 2012·Granted Mar 25, 2014·0 cites·15 claims
- 3250US7844925B2System and method for power domain optimizationIBM·Filed 2007·Granted Nov 30, 2010·0 cites·17 claims
- 3347US2017053899A1OPTIMIZING POWER DISTRIBUTION FROM A POWER SOURCE THROUGH A C4 SOLDER BALL GRID INTERCONNECTED THROUGH SILICON VIAS IN INTERMEDIATE INTEGRATED CIRCUIT CHIP CONNECTED TO CIRCUITRY IN AN UPPER INTERGRATED CIRCUIT CHIP THROUGH A GRID OF MICRO uC4 SOLDER BALLSIBM·Filed 2016·Application pending·0 cites
- 3440US10147654B2Package materials monitor and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2016·Granted Dec 4, 2018·0 cites·20 claims
- 3535US8407644B2Reducing crosstalk in the design of module netsCABRERA DULCE M ALTABELLA·Filed 2009·Granted Mar 26, 2013·0 cites·20 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →