Inventor · disambiguated record
Allan H. Dansky
Also filed as: DANSKY ALLAN H · DANSKY ALLAN HARVEY
17 granted patents·306 citations·filing 1983–2001
95Inventor score
Files withIBM17
Top patents by PatentIndex Score
17 records- 0180US6323050B1Method for evaluating decoupling capacitor placement for VLSI chipsIBM·Filed 2000·Granted Nov 27, 2001·26 cites·17 claims
- 0279US4746817ABIFET logic circuitIBM·Filed 1987·Granted May 24, 1988·29 cites·30 claims
- 0379US4605870AHigh speed low power current controlled gate circuitIBM·Filed 1983·Granted Aug 12, 1986·23 cites·8 claims
- 0476US6546529B1Method for performing coupling analysisIBM·Filed 2000·Granted Apr 8, 2003·25 cites·8 claims
- 0565US6618843B2Method for evaluating decoupling capacitor placement for VLSI chipsIBM·Filed 2001·Granted Sep 9, 2003·9 cites·17 claims
- 0663US6618844B2Method for evaluating decoupling capacitor placement for VLSI chipsIBM·Filed 2001·Granted Sep 9, 2003·8 cites·19 claims
- 0762US6028989ACalculating crosstalk voltage from IC craftsman routing dataIBM·Filed 1998·Granted Feb 22, 2000·45 cites·12 claims
- 0860US6342823B1System and method for reducing calculation complexity of lossy, frequency-dependent transmission-line computationIBM·Filed 1998·Granted Jan 29, 2002·37 cites·6 claims
- 0953US5030856AReceiver and level converter circuit with dual feedbackIBM·Filed 1989·Granted Jul 9, 1991·10 cites·17 claims
- 1051US6418401B1Efficient method for modeling three-dimensional interconnect structures for frequency-dependent crosstalk simulationIBM·Filed 1999·Granted Jul 9, 2002·24 cites·12 claims
- 1146US6460169B1Routing program method for positioning unit pins in a hierarchically designed VLSI chipIBM·Filed 1999·Granted Oct 1, 2002·18 cites·11 claims
- 1244US6374394B1Method to identify unit pins that are not optimally positioned in a hierarchically designed VLSI chipIBM·Filed 1999·Granted Apr 16, 2002·16 cites·11 claims
- 1344US5166552AMulti-emitter bicmos logic circuit family with superior performanceIBM·Filed 1988·Granted Nov 24, 1992·7 cites·43 claims
- 1441US6415428B1Minimal length method for positioning unit pins in a hierarchically designed VLSI chipIBM·Filed 1999·Granted Jul 2, 2002·13 cites·13 claims
- 1539US4668879ADotted "or" function for current controlled gatesIBM·Filed 1986·Granted May 26, 1987·6 cites·9 claims
- 1634US5121001ALow power push-pull driverIBM·Filed 1991·Granted Jun 9, 1992·4 cites·16 claims
- 1731US5287016AHigh-speed bipolar-field effect transistor (BI-FET) circuitIBM·Filed 1992·Granted Feb 15, 1994·6 cites·12 claims
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