Inventor · disambiguated record
Chaw Sing Ho
Also filed as: HO CHAW SING
20 granted patents·4 pending applications·628 citations·filing 1998–2019
95Inventor score
Files withCHARTERED SEMICONDUCTOR MFG12HEWLETT PACKARD DEVELOPMENT CO4HEWLETT PACKARD DEVELOPMENT CO LP3CHARTERED SEMICONDUCTORS MFG L2GE NING1
Top patents by PatentIndex Score
24 records- 0196US6410376B1Method to fabricate dual-metal CMOS transistors for sub-0.1 μm ULSI integrationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Jun 25, 2002·165 cites·34 claims
- 0292US6730573B1MIM and metal resistor formation at CU beol using only one extra maskCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted May 4, 2004·96 cites·31 claims
- 0392US6709918B1Method for making a metal-insulator-metal (MIM) capacitor and metal resistor for a copper back-end-of-line (BEOL) technologyCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Mar 23, 2004·87 cites·30 claims
- 0486US6624040B1Self-integrated vertical MIM capacitor in the dual damascene processCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Sep 23, 2003·46 cites·34 claims
- 0583US6410429B1Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow junctionsCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Jun 25, 2002·33 cites·15 claims
- 0679US9908332B2Ink property sensing on a printheadHEWLETT PACKARD DEVELOPMENT CO·Filed 2014·Granted Mar 6, 2018·2 cites·13 claims
- 0779US9252149B2Device including active floating gate region area that is smaller than channel areaGE NING·Filed 2012·Granted Feb 2, 2016·4 cites·11 claims
- 0879US6180501B1Method to fabricate a double-polysilicon gate structure for a sub-quarter micron self-aligned-titanium silicide processCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Jan 30, 2001·44 cites·21 claims
- 0977US6902981B2Structure and process for a capacitor and other devicesCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jun 7, 2005·22 cites·43 claims
- 1077US6156654APulsed laser salicidation for fabrication of ultra-thin silicides in sub-quarter micron devicesCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted Dec 5, 2000·50 cites·32 claims
- 1176US6010954ACmos gate architecture for integration of salicide process in sub 0.1 . .muM devicesCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted Jan 4, 2000·41 cites·17 claims
- 1266US6528838B1Damascene MIM capacitor with a curvilinear surface structureCHARTERED SEMICONDUCTORS MFG L·Filed 2001·Granted Mar 4, 2003·11 cites·13 claims
- 1365US6645810B2Method to fabricate MIM capacitor using damascene processCHARTERED SEMICONDUCTORS MFG L·Filed 2001·Granted Nov 11, 2003·14 cites·13 claims
- 1460US10319728B2Fluid ejection devices comprising memory cellsHEWLETT PACKARD DEVELOPMENT CO·Filed 2016·Granted Jun 11, 2019·0 cites·20 claims
- 1559US6548367B1Method to fabricate MIM capacitor with a curvillnear surface using damascene processCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Apr 15, 2003·7 cites·7 claims
- 1655US9559106B2Memory cell that prevents charge lossHEWLETT PACKARD DEVELOPMENT CO LP·Filed 2012·Granted Jan 31, 2017·0 cites·11 claims
- 1754US9199460B2Apparatuses including a plate having a recess and a corresponding protrusion to define a chamberHEWLETT PACKARD DEVELOPMENT CO·Filed 2013·Granted Dec 1, 2015·0 cites·13 claims
- 1851US9457571B2Fluid ejection apparatuses including a substrate with a bulk layer and a epitaxial layerHEWLETT PACKARD DEVELOPMENT CO LP·Filed 2013·Granted Oct 4, 2016·0 cites·12 claims
- 1949US10336069B2Electrically-functional optical targetHEWLETT PACKARD DEVELOPMENT CO·Filed 2015·Granted Jul 2, 2019·0 cites·21 claims
- 2049US2021394446A1Method of additive manufacturing of object using object material, object manufactured using the same, and method of scanning an object identifier formed using the sameSECUR3DP PTE LTD·Filed 2019·Application pending·0 cites
- 2143US2010038752A1Modular & scalable intra-metal capacitorsCHARTERED SEMICONDUCTOR MFG·Filed 2008·Application pending·0 cites
- 2238US6281117B1Method to form uniform silicide featuresCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Aug 28, 2001·6 cites·23 claims
- 2337US2016315256A1V-shape resistive memory elementHEWLETT PACKARD ENTPR DEV LP·Filed 2013·Application pending·0 cites
- 2431US2018022103A1Printheads with eprom cells having etched multi-metal floating gatesHEWLETT PACKARD DEVELOPMENT CO LP·Filed 2015·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →