Inventor · disambiguated record
Stephen R. Undy
Also filed as: UNDY STEPHEN · UNDY STEPHEN R
18 granted patents·5 pending applications·455 citations·filing 1996–2004
95Inventor score
Top patents by PatentIndex Score
23 records- 0193US6721875B1Method and apparatus for implementing a single-syllable IP-relative branch instruction and a long IP-relative branch instruction in a processor which fetches instructions in bundle formHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Apr 13, 2004·84 cites·13 claims
- 0279US5751735AIntegrated debug trigger method and apparatus for an integrated circuitHEWLETT PACKARD CO·Filed 1996·Granted May 12, 1998·96 cites·17 claims
- 0375US7343479B2Method and apparatus for implementing two architectures in a chipHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Mar 11, 2008·18 cites·13 claims
- 0475US6678817B1Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engineHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jan 13, 2004·23 cites·1 claims
- 0574US6629167B1Pipeline decoupling buffer for handling early data and late dataHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 30, 2003·20 cites·21 claims
- 0673US6799263B1Prefetch instruction for an unpredicted path including a flush field for indicating whether earlier prefetches are to be discarded and whether in-progress prefetches are to be abortedHEWLETT PACKARD DEVELOPMENT CO·Filed 1999·Granted Sep 28, 2004·70 cites·20 claims
- 0772US6883150B2Automatic manufacturing test case generation method and systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Apr 19, 2005·19 cites·20 claims
- 0869US6711671B1Non-speculative instruction fetch in speculative processingHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Mar 23, 2004·14 cites·17 claims
- 0967US6944751B2Register renaming to reduce bypass and increase apparent physical register sizeHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Sep 13, 2005·12 cites·18 claims
- 1066US6516388B1Method and apparatus for reducing cache pollutionHEWLETT PACKARD CO·Filed 2000·Granted Feb 4, 2003·12 cites·20 claims
- 1165US6647487B1Apparatus and method for shift register rate control of microprocessor instruction prefetchesHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 11, 2003·12 cites·11 claims
- 1265US6618801B1Method and apparatus for implementing two architectures in a chip using bundles that contain microinstructions and template informationHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 9, 2003·10 cites·20 claims
- 1352US5860097AAssociative cache memory with improved hit timeHEWLETT PACKARD CO·Filed 1996·Granted Jan 12, 1999·27 cites·1 claims
- 1446US6493792B1Mechanism for broadside reads of CAM structuresHEWLETT PACKARD CO·Filed 2000·Granted Dec 10, 2002·5 cites·9 claims
- 1546US2004049667A1Method of patching compiled and linked program code comprising instructions which are grouped into bundlesFiled 2003·Application pending·0 cites
- 1646US2004095965A1Routing of wires carrying single-syllable IP-relative branch instructions and long IP-relative branch instructionsFiled 2003·Application pending·0 cites
- 1744US7356674B2Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engineHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Apr 8, 2008·0 cites·15 claims
- 1844US2005108509A1Error detection method and system for processors that employs lockstepped concurrent threadsFiled 2003·Application pending·0 cites
- 1944US2005138478A1Error detection method and system for processors that employ alternating threadsFiled 2003·Application pending·0 cites
- 2041US5860096AMulti-level instruction cache for a computerHEWLETT PACKARD CO·Filed 1996·Granted Jan 12, 1999·15 cites·6 claims
- 2140US5961655AOpportunistic use of pre-corrected data to improve processor performanceHEWLETT PACKARD CO·Filed 1996·Granted Oct 5, 1999·12 cites·20 claims
- 2237US2006112257A1Microprocessor architected state signature analysisUNDY STEPHEN R·Filed 2004·Application pending·0 cites
- 2330US5829049ASimultaneous execution of two memory reference instructions with only one address calculationHEWLETT PACKARD CO·Filed 1997·Granted Oct 27, 1998·6 cites·10 claims
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