Inventor · disambiguated record
Chia-Ling Lu
Also filed as: LU CHIA-LING
12 granted patents·10 pending applications·54 citations·filing 2003–2025
89Inventor score
Files withMACRONIX INT CO LTD8WANG SHIH-YU4TAIWAN SEMICONDUCTOR MFG CO LTD2MOXA INC1NATIONAL CHAIO TUNG UNIV1
Top patents by PatentIndex Score
22 records- 0186US9994967B2Copper film with large grains, copper clad laminate having the same and manufacturing method of copper clad laminateNATIONAL CHAIO TUNG UNIV·Filed 2015·Granted Jun 12, 2018·3 cites·16 claims
- 0285US7087968B1Electrostatic discharge protection circuit and semiconductor circuit therewithMACRONIX INT CO LTD·Filed 2005·Granted Aug 8, 2006·13 cites·42 claims
- 0384US7643258B2Methods and apparatus for electrostatic discharge protection in a semiconductor circuitMACRONIX INT CO LTD·Filed 2006·Granted Jan 5, 2010·12 cites·19 claims
- 0479US2025364343A1Reinforced structure with capping layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0574US8952457B2Electrostatic discharge protection circuitWANG SHIH-YU·Filed 2008·Granted Feb 10, 2015·6 cites·16 claims
- 0674US8345396B2Electrostatic discharge protectors having increased RC delaysMACRONIX INT CO LTD·Filed 2010·Granted Jan 1, 2013·4 cites·20 claims
- 0764US2023395450A1Reinforced structure with capping layer and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Application pending·0 cites
- 0862US8253165B2Structures for lowering trigger voltage in an electrostatic discharge protection deviceWANG SHIH-YU·Filed 2009·Granted Aug 28, 2012·2 cites·18 claims
- 0958US7573102B2ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant padMACRONIX INT CO LTD·Filed 2006·Granted Aug 11, 2009·1 cites·8 claims
- 1057US9153570B2ESD tolerant I/O pad circuit including a surrounding wellWANG SHIH-YU·Filed 2010·Granted Oct 6, 2015·1 cites·14 claims
- 1155US2025245023A1Iot gateway and script variable binding method thereofMOXA INC·Filed 2024·Application pending·0 cites
- 1252US7193274B2ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant padMACRONIX INT CO LTD·Filed 2004·Granted Mar 20, 2007·4 cites·8 claims
- 1352US7012305B2Electro-static discharge protection circuit for dual-polarity input/output padMACRONIX INT CO LTD·Filed 2004·Granted Mar 14, 2006·5 cites·8 claims
- 1449US8748936B2Methods and structures for electrostatic discharge protectionWANG SHIH-YU·Filed 2012·Granted Jun 10, 2014·0 cites·23 claims
- 1548US7291870B2Electrostatic protection circuitMACRONIX INT CO LTD·Filed 2004·Granted Nov 6, 2007·3 cites·9 claims
- 1644US2015064496A1Single crystal copper, manufacturing method thereof and substrate comprising the sameUNIV NAT CHIAO TUNG·Filed 2014·Application pending·0 cites
- 1743US2010109076A1Structures for electrostatic discharge protectionMACRONIX INT CO LTD·Filed 2008·Application pending·0 cites
- 1832US2004183179A1Package structure for a multi-chip integrated circuitFiled 2003·Application pending·0 cites
- 1932US2003160316A1Open-type multichips stack packagingFiled 2003·Application pending·0 cites
- 2031US2004082174A1Method of wire bonding of a semiconductor device for resolving oxidation of copper bonding padFiled 2003·Application pending·0 cites
- 2130US2004082159A1Fabrication method for solder bump pattern of rear section wafer packageFiled 2003·Application pending·0 cites
- 2224US2012205771A1Schottky diode with low forward voltage dropTUNG CHIUN-YEN·Filed 2011·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →